Artikel

Shoufan, Abdulhadi ; Huber, Nico ; Molter, Gregor (2011)
A Novel Cryptoprocessor Architecture for Chained Merkle Signature Scheme.
In: Microprocessors and Microsystems, Embedded Hardware Design, Elsevier, 35 (1)
doi: 10.1016/j.micpro.2010.07.002
Artikel, Bibliographie

Molter, Gregor ; Stoettinger, Marc ; Shoufan, Abdulhadi ; Strenzke, Falko (2011)
A Simple Power Analysis Attack on a McEliece Cryptoprocessor.
In: Journal of Cryptographic Engineering
Artikel, Bibliographie

Shoufan, Abdulhadi ; Wink, Thorsten ; Molter, Gregor ; Huss, Sorin ; Kohnert, Eike (2010)
A Novel Cryptoprocessor Architecture for the McEliece Public-Key Cryptosystem.
In: IEEE Transactions on Computers
doi: 10.1109/TC.2010.115
Artikel, Bibliographie

Buchkapitel

Schindler, Werner
Hrsg.: Biedermann, Alexander ; Molter, Gregor (2010)
Side-Channel Analysis - Mathematics has Met Engineering.
In: Design Methodologies for Secure Embedded Systems
Buchkapitel, Bibliographie

Buch

Hrsg.: Biedermann, Alexander ; Molter, Gregor (2010)
Design Methodologies for Secure Embedded Systems.
Buch, Bibliographie

Molter, Gregor (2008)
Kryptographischer Coprozessor für Server: Effiziente und flexible Multi-Core-Architektur für Server als System-on-a-Chip.
Buch, Bibliographie

Konferenzveröffentlichung

Molter, Gregor ; Seffrin, André ; Huss, Sorin (2011)
State Space Optimization within the DEVS Model of Computation for Timing Efficiency.
Konferenzveröffentlichung, Bibliographie

Shoufan, Abdulhadi ; Strenzke, Falko ; Molter, Gregor ; Stoettinger, Marc (2009)
A Timing Attack Against Patterson Algorithm in the McEliece PKC.
Konferenzveröffentlichung, Bibliographie

Molter, Gregor ; Madlener, Felix ; Huss, Sorin (2009)
A System Level Design Flow for Embedded Systems based on Model of Computation Mappings.
Konferenzveröffentlichung, Bibliographie

Molter, Gregor ; Seffrin, André ; Huss, Sorin (2009)
DEVS2VHDL: Automatic Transformation of XML-specified DEVS Model of Computation into Synthesizable VHDL Code.
Konferenzveröffentlichung, Bibliographie

Molter, Gregor ; Ogata, Kei ; Tews, Erik ; Weinmann, Ralf-Philipp (2009)
An Efficient FPGA Implementation for an DECT Brute-Force Attacking Scenario.
doi: 10.1109/ICWMC.2009.20
Konferenzveröffentlichung, Bibliographie

Shoufan, Abdulhadi ; Wink, Thorsten ; Molter, Gregor ; Huss, Sorin ; Strenzke, Falko (2009)
A Novel Processor Architecture for McEliece Cryptosystem and FPGA Platforms.
doi: 10.1109/ASAP.2009.29
Konferenzveröffentlichung, Bibliographie

Madlener, Felix ; Molter, Gregor ; Huss, Sorin (2009)
SC-DEVS: An efficient SystemC Extension for the DEVS Model of Computation.
https://www.date-conference.com/proceedings-archive/PAPERS/2009/DATE09/PDFFILES/11.6_4.PDF.
Konferenzveröffentlichung, Bibliographie

Strenzke, Falko ; Tews, Erik ; Molter, Gregor ; Overbeck, Raphael ; Shoufan, Abdulhadi (2008)
Side Channels in the McEliece PKC.
doi: 10.1007/978-3-540-88403-3_15
Konferenzveröffentlichung, Bibliographie

Laue, Ralf ; Molter, Gregor ; Rieder, Felix ; Saxena, Kartik ; Huss, Sorin (2008)
A Novel Multiple Core Co-Processor Architecture for Efficient Server-based Public Key Cryptographic Applications.
doi: 10.1109/ISVLSI.2008.9
Konferenzveröffentlichung, Bibliographie

Report

Molter, Gregor ; Shao, Hui ; Sudbrock, Henning ; Huss, Sorin ; Mantel, Heiko (2008)
Designing a Coprocessor for Interrupt Handling on an FPGA.
Report, Bibliographie