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Number of items: 16.

Shoufan, Abdulhadi ; Huber, Nico ; Molter, Gregor (2011):
A Novel Cryptoprocessor Architecture for Chained Merkle Signature Scheme.
In: Microprocessors and Microsystems, Embedded Hardware Design, Elsevier, 35 (1), pp. 34-47. DOI: 10.1016/j.micpro.2010.07.002,
[Article]

Molter, Gregor ; Stoettinger, Marc ; Shoufan, Abdulhadi ; Strenzke, Falko (2011):
A Simple Power Analysis Attack on a McEliece Cryptoprocessor.
In: Journal of Cryptographic Engineering, [Article]

Molter, Gregor ; Seffrin, André ; Huss, Sorin (2011):
State Space Optimization within the DEVS Model of Computation for Timing Efficiency.
In: 19th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC'11),
[Conference or Workshop Item]

Schindler, Werner
Biedermann, Alexander ; Molter, Gregor (eds.) (2010):
Side-Channel Analysis - Mathematics has Met Engineering.
In: LNEE, In: Design Methodologies for Secure Embedded Systems, pp. 43-62, Springer, [Book Section]

Shoufan, Abdulhadi ; Wink, Thorsten ; Molter, Gregor ; Huss, Sorin ; Kohnert, Eike (2010):
A Novel Cryptoprocessor Architecture for the McEliece Public-Key Cryptosystem.
In: IEEE Transactions on Computers, DOI: 10.1109/TC.2010.115,
[Article]

Biedermann, Alexander ; Molter, Gregor (eds.) (2010):
Design Methodologies for Secure Embedded Systems.
In: Lecture Notes in Electrical Engineering, 78., Springer, ISBN 978-3-64-216766-9,
[Book]

Shoufan, Abdulhadi ; Strenzke, Falko ; Molter, Gregor ; Stoettinger, Marc (2009):
A Timing Attack Against Patterson Algorithm in the McEliece PKC.
In: Lecture Notes in Computer Science, In: 12th International Conference on Information Security and Cryptology (ICISC'09),
[Conference or Workshop Item]

Molter, Gregor ; Madlener, Felix ; Huss, Sorin (2009):
A System Level Design Flow for Embedded Systems based on Model of Computation Mappings.
In: 4th IFAC Workshop on Discrete-Event System Design (DESDes'09),
[Conference or Workshop Item]

Molter, Gregor ; Seffrin, André ; Huss, Sorin (2009):
DEVS2VHDL: Automatic Transformation of XML-specified DEVS Model of Computation into Synthesizable VHDL Code.
In: 12th IEEE Forum on Specification and Design Languages (FDL 2009),
[Conference or Workshop Item]

Molter, Gregor ; Ogata, Kei ; Tews, Erik ; Weinmann, Ralf-Philipp (2009):
An Efficient FPGA Implementation for an DECT Brute-Force Attacking Scenario.
In: 5th IEEE International Conference on Wireless and Mobile Communications (ICWMC 2009), pp. 82-86,
IEEE Computer Society, ISBN 978-0-76-953750-4,
DOI: 10.1109/ICWMC.2009.20,
[Conference or Workshop Item]

Shoufan, Abdulhadi ; Wink, Thorsten ; Molter, Gregor ; Huss, Sorin ; Strenzke, Falko (2009):
A Novel Processor Architecture for McEliece Cryptosystem and FPGA Platforms.
In: 20th IEEE International Conference on Application-specific Systems, Architectures and Processors,
DOI: 10.1109/ASAP.2009.29,
[Conference or Workshop Item]

Madlener, Felix ; Molter, Gregor ; Huss, Sorin (2009):
SC-DEVS: An efficient SystemC Extension for the DEVS Model of Computation.
In: ACM/IEEE Design Automation and Test in Europe (DATE'09),
https://www.date-conference.com/proceedings-archive/PAPERS/2009/DATE09/PDFFILES/11.6_4.PDF, [Conference or Workshop Item]

Strenzke, Falko ; Tews, Erik ; Molter, Gregor ; Overbeck, Raphael ; Shoufan, Abdulhadi (2008):
Side Channels in the McEliece PKC.
In: Lecture Notes in Computer Science, In: Int. Workshop on Post-Quantum Cryptography (PQCrypto 2008), pp. 216-229,
DOI: 10.1007/978-3-540-88403-3_15,
[Conference or Workshop Item]

Molter, Gregor (2008):
Kryptographischer Coprozessor für Server: Effiziente und flexible Multi-Core-Architektur für Server als System-on-a-Chip.
VDM Verlag Dr. Müller, ISBN 978-3-63-905437-8,
[Book]

Laue, Ralf ; Molter, Gregor ; Rieder, Felix ; Saxena, Kartik ; Huss, Sorin (2008):
A Novel Multiple Core Co-Processor Architecture for Efficient Server-based Public Key Cryptographic Applications.
In: IEEE Computer Society Annual Symposium on VLSI,
DOI: 10.1109/ISVLSI.2008.9,
[Conference or Workshop Item]

Molter, Gregor ; Shao, Hui ; Sudbrock, Henning ; Huss, Sorin ; Mantel, Heiko (2008):
Designing a Coprocessor for Interrupt Handling on an FPGA.
[Report]

This list was generated on Tue Jun 22 01:20:37 2021 CEST.