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Number of items at this level (without sub-levels): 38.

A

Ali, Azad (2017):
Fault-Tolerant Spatio-Temporal Compression Scheme for Wireless Sensor Networks.
Darmstadt, Technische Universität Darmstadt,
[Ph.D. Thesis]

B

Burger, Michael (2011):
Das effiziente Raytracen von Dreiecksnetzen auf Mehrkernprozessoren, GPUs und FPGAs mittels Geometrischer Algebra.
Darmstadt, TU Darmstadt, [Master Thesis]

E

Engel, Andreas (2016):
A Heterogeneous System Architecture for Low-Power Wireless Sensor Nodes in Compute-Intensive Distributed Applications.
Darmstadt, Technische Universität Darmstadt,
[Ph.D. Thesis]

Engel, Andreas and Hildebrand, Paul and Pott, Peter P. and Schlaak, Helmut F. and Koch, Andreas (2014):
A Hardware-accelerated embedded controller for a piezo-electric haptic feedback system.
Bremen, 14th International Conference on New Actuators - ACTUATOR14, Bremen, 23.25.06.2014, [Conference or Workshop Item]

G

Graubner, Pablo and Sommer, Markus and Hollick, Matthias and Freisleben, Bernd (2017):
Dynamic Role Assignment in Software-Defined Wireless Networks.
2017 IEEE Symposium on Computers and Communications (ISCC), Heraklion, Greece, 03.-06. July, DOI: 10.1109/ISCC.2017.8024619,
[Conference or Workshop Item]

Gädke, H. and Koch, Andreas (2007):
Comrade : a Compiler for Adaptive Systems.
In: 2007 Design, Automation & Test in Europe Conference & Exhibition : Nice, France, 16 - 20 April 2007 / [sponsored by EDAA ...] ISBN: 978-3-9810801-2-4, [Conference or Workshop Item]

Gädke, H. and Koch, Andreas (2007):
Comrade - A Compiler for Adaptive Computing Systems Using a Novel Fast Speculation Technique.
In: International Conference on Field Programmable Logic and Applications (FPL) <Amsterdam,2007>, [Conference or Workshop Item]

Gädke, Koch (2004):
Wavelet-based Image Compression on the Reconfigurable Computer ACE-V.
In: LNCS Intl. Conf. On Field-Programmable Logic (FPL), Antwerpen,
[Conference or Workshop Item]

H

Hofmann, Jaco (2020):
An Improved Framework for and Case Studies in FPGA-Based Application Acceleration - Computer Vision, In-Network Processing and Spiking Neural Networks.
Darmstadt, Technische Universität,
DOI: 10.25534/tuprints-00010355,
[Ph.D. Thesis]

Halkenhäuser, Michael (2018):
An Alternative OpenMP-Backend for Polly.
Darmstadt, Technische Universität, [Bachelor Thesis]

Huthmann, Jens Christoph (2017):
An Execution Model and High-Level-Synthesis System for Generating SIMT Multi-Threaded Hardware from C Source Code.
Darmstadt, Technische Universität,
[Ph.D. Thesis]

K

Koch, Andreas (2007):
Efficient Integration of Pipelined IP Blocks into Automatically Compiled Datapaths.
In: EURASIP Journal on Embedded Systems, 2007, p. 9. [Article]

Kasprzyk, Nico and van der Veen, Jan and Koch, Andreas (2005):
Configuration merging for adaptive computer applications.
In: International Conference On Field-Programmable Logic and Applications <Tampere, FI,2005> ; 2005 International Conference on Field-Programmable Logic and Applications (FPL) ; 217-222 ; ISBN: 0-7803-9362-7, pp. 217-222, [Conference or Workshop Item]

Kasprzyk, Nico and Koch, Andreas (2005):
High-Level-Language Compilation for Reconfigurable Computer.
In: International Conference on Reconfigurable Communication-centric SoCs <Montpellier, F,2005> ; International Conference on Reconfigurable Communication-centric System-on-Chips ; 1-9 ; ISBN: 2-9517-4611-3, pp. 1-9, [Conference or Workshop Item]

Koch, Andreas and Lange, Holger (2004):
Hardware/Software-Codesign by Automatic Embedding of Complex IP Cores.
In: LNCS Intl. Conf. On Field-Programmable Logic (FPL), Antwerpen,
[Conference or Workshop Item]

L

Liebig, Björn (2018):
Domain-Specific High Level Synthesis of Floating-Point Computations to Resource-Shared Microarchitectures.
Darmstadt, Technische Universität,
[Ph.D. Thesis]

Lange, Holger (2011):
Reconfigurable Computing Platforms and Target System Architectures for Automatic HW/SW Compilation.
TU Darmstadt,
[Ph.D. Thesis]

Lange, H. and Koch, Andreas (2007):
An Execution Model for Hardware/Software Compilation and its System-Level Realization.
In: International Conference on Field Programmable Logic and Applications (FPL) <Amsterdam,2007>, [Conference or Workshop Item]

Lange, H. and Koch, Andreas (2007):
Design and System Level Evaluation of a High Performance Memory System for reconfigurable SoC Platforms.
In: Design and System Level Evaluation of a High Performance Memory System for reconfigurable SoC Platforms <Gent,2007> ; Proc. HiPEAC Workshop on Reconfigurable Computing, Gent, 01-07, [Conference or Workshop Item]

M

Mühlbach, Sascha (2015):
Reconfigurable Architectures and Design Automation Tools for Application-Level Network Security.
Berlin, Logos, TU Darmstadt, ISBN 978-3-8325-3955-7,
[Ph.D. Thesis]

Mysore Sachidananda, Vinay (2014):
On Maximizing the Efficiency of Multipurpose WSNs Through Avoidance of Over- or Under-Provisioning of Information.
Darmstadt, Germany, TU Prints, TU Darmstadt,
[Ph.D. Thesis]

Mühlbach, Sascha and Koch, Andreas (2014):
A Reconfigurable Platform and Programming Tools for High-Level Network Applications Demonstrated as a Hardware Honeypot.
In: IEEE Journal on Selected Areas in Communications, 32 (10), pp. 1919-1932. ISSN 0733-8716,
DOI: 10.1109/JSAC.2014.2358838,
[Article]

N

Norrdine, Abdelmoumen (2009):
Präzise Positionierung und Orientierung innerhalb von Gebäuden.
In: Schriftenreihe Fachrichtung Geodäsie Fachbereich Bauingenieurwesen und Geodäsie, 29, Darmstadt, Technische Universität Darmstadt; Geodätisches Institut, ISBN 978-3-935631-18-1,
[Book]

O

Oppermann, Julian and Sommer, Lukas and Weber, Lukas and Reuter-Oppermann, Melanie and Koch, Andreas and Sinnen, Oliver (2019):
SkyCastle: A Resource-Aware Multi-Loop Scheduler for High-Level Synthesis.
International Conference on Field-Programmable Technology (FPT), Tianjin, China, 09.-13. Dec., [Conference or Workshop Item]

Ober, Micha and Hofmann, Jaco and Sommer, Lukas and Weber, Lukas and Koch, Andreas (2019):
High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud.
pp. 26-33, 2019 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC), Denver, USA, 17.11.2019, ISBN 978-1-7281-5999-7,
DOI: 10.1109/H2RC49586.2019.00009,
[Conference or Workshop Item]

Oppermann, Julian (2019):
Advances in ILP-based Modulo Scheduling for High-Level Synthesis.
Darmstadt, Technische Universität,
[Ph.D. Thesis]

P

Platzner, M. and Großpietsch, K. and Hochberger, C. and Koch, Andreas (2007):
ARCS '07 - 20th International Conference on Architecture of Computing Systems 2007.
In: Zürich <,2007> ; Workshop Proceedings, VDE Verlag, 03-07., [Conference or Workshop Item]

S

Solis-Vasquez, Leonardo and Santos-Martins, Diogo and Koch, Andreas and Forli, Stefano (2020):
Evaluating the Energy Efficiency of OpenCL-accelerated AutoDock Molecular Docking.
pp. 162-166, IEEE, 28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2020), Västerås, Sweden, 11.-13.03., ISBN 9781728165837,
DOI: 10.1109/PDP50117.2020.00031,
[Conference or Workshop Item]

Sommer, Lukas and Weber, Lukas and Kumm, Martin and Koch, Andreas (2020):
Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs.
2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), virtual Conference, 03.-06. May, [Conference or Workshop Item]

Solis Vasquez, Leonardo (2019):
Accelerating Molecular Docking by Parallelized Heterogeneous Computing - A Case Study of Performance, Quality of Results, and Energy-Efficiency using CPUs, GPUs, and FPGAs.
Darmstadt, Technische Universität,
DOI: 10.25534/tuprints-00009288,
[Ph.D. Thesis]

Stock, Florian-Wolfgang (2019):
Rapid Prototyping and Exploration Environment for Generating C-to-Hardware-Compilers.
Darmstadt, Technische Universität,
[Ph.D. Thesis]

Solis-Vasquez, Leonardo and Koch, Andreas (2018):
A Case Study in Using OpenCL on FPGAs: Creating an Open-Source Accelerator of the AutoDock Molecular Docking Software.
Fifth International Workshop on FPGAs for Software Programmers (FSP), Dublin, Ireland, August 31, 2018, ISBN 978-3-8007-4723-8,
[Conference or Workshop Item]

Sommer, Lukas and Oppermann, Julian and Molina, Alejandro and Binnig, Carsten and Kersting, Kristian and Koch, Andreas (2018):
Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-based Accelerators.
36th International Conference on Computer Design (ICCD), Orlando, USA, 07.-10. Oct., 2018, DOI: 10.1109/ICCD.2018.00060,
[Conference or Workshop Item]

Solis-Vasquez, Leonardo and Koch, Andreas (2017):
A Performance and Energy Evaluation of OpenCL-Accelerated Molecular Docking.
Association for Computing Machinery, 5th International Workshop on OpenCL (IWOCL 2017), Toronto, Canada, 16.-18.05., ISBN 9781450352147,
DOI: 10.1145/3078155.3078167,
[Conference or Workshop Item]

Sterzelmaier, Felix Karl (2016):
Implementierung und Optimierung eines On-Chip Routing Verfahrens für SpartanMC.
Darmstadt, Technische Universität Darmstadt, [Bachelor Thesis]

Stoettinger, Marc and Huss, Sorin and Mühlbach, Sascha and Koch, Andreas (2010):
Side-Channel Resistance Evaluation of a Neural Network Based Lightweight Cryptography Scheme.
In: 6th IEEE/IFIP International Symposium on Trusted Computing and Communications (TrustCom 2010),
[Conference or Workshop Item]

W

Weber, Lukas and Sommer, Lukas and Oppermann, Julian and Molina, Alejandro and Kersting, Kristian and Koch, Andreas (2019):
Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs.
International Conference on Field-Programmable Technology (FPT), Tianjin, China, 09.-13. Dec., [Conference or Workshop Item]

Wachsmann, Christian (2014):
Trusted and Privacy-preserving Embedded Systems: Advances in Design, Analysis and Application of Lightweight Privacy-preserving Authentication and Physical Security Primitives.
Darmstadt, Technische Universität Darmstadt,
[Ph.D. Thesis]

This list was generated on Thu Dec 3 01:46:22 2020 CET.