TU Darmstadt / ULB / TUbiblio

Browse by Person

Up a level
Export as [feed] Atom [feed] RSS 1.0 [feed] RSS 2.0
Group by: No Grouping | Item Type | Date | Language
Number of items: 17.

Reuter, Maximilian ; Pfau, Johannes ; Krauss, Tillmann A. ; Becker, Jürgen ; Hofmann, Klaus (2020):
From MOSFETs to Ambipolar Transistors: Standard Cell Synthesis for the Planar RFET Technology.
In: IEEE Transactions on Circuits and Systems I: Regular Papers, p. 12. IEEE, ISSN 1549-8328,
DOI: 10.1109/TCSI.2020.3035889,
[Article]

Halbach, Mathias ; Hoffmann, Rolf
Karl, Wolfgang ; Becker, Jürgen ; Großpietsch, Karl-Erwin ; Hochberger, Christian ; Maehle, Erik (eds.) (2006):
Minimising the Hardware Resources for a Cellular Automaton with Moving Creatures.
In: LNI, 81, In: {ARCS} 2006 - 19th International Conference on Architecture of Computing Systems, Workshops Proceedings, March 16, 2006, Frankfurt am Main, Germany, pp. 323--332,
GI, ISBN 3-88579-175-7,
[Conference or Workshop Item]

Halbach, Mathias ; Hoffmann, Rolf ; Röder, Patrick
Brinkschulte, Uwe ; Becker, Jürgen ; Fey, Dietmar ; Großpietsch, Karl-Erwin ; Hochberger, Christian ; Maehle, Erik ; Runkler, Thomas (eds.) (2004):
{FPGA} Implementation of Cellular Automata Compared to Software Implementation.
In: LNI, P-41, In: {ARCS} 2004 - Organic and Pervasive Computing, Workshops Proceedings, March 26, 2004, Augsburg, Germany, pp. 309--317,
GI, ISBN 3-88579-370-9,
[Conference or Workshop Item]

Indrusiak, Leandro Soares ; Becker, Jürgen ; Glesner, Manfred ; Reis, Ricardo (2002):
Distributed collaborative design over cave2 framework.
In: International Conference on Very Large Scale Integration of Systems-on-Chip <11, 2001, Montpellier>: SOC design methodologies / IFIP .... Ed. by Michel Robert ...- Boston [u.a.]: Kluwer, 2002.- ISBN 1-402-07148-5, Boston [u.a.], Kluwer, [Conference or Workshop Item]

Becker, Jürgen ; Piontek, T. ; Glesner, M. (2001):
Adaptive systems-on-chip: Architectures, technologies and applications.
In: Symposium on Integrated Circuits and Systems Design <14, 2001, Pirenopolis, Brazil>: Proceedings. S. 2-7, [Conference or Workshop Item]

Becker, Jürgen ; Pionteck, T. ; Glesner, M. (2001):
Design and implementation of a coarse-grained dynamically reconfigurable hardware architecture.
In: Computer Society Workshop on VLSI <2001, Orlando, Florida>: Proceedings. S. 41-46. - Los Alamitos, Calif.: IEEE Computer Soc., 2001, Los Alamitos, Calif., IEEE Computer Soc., [Conference or Workshop Item]

Indrusiak, Leandro Soares ; Hernandez, E. B. ; Sawicki, S. ; Reis, Ricardo ; Becker, Jürgen ; Glesner, Manfred (2001):
Distributed system-level design using pair-programming over Cave.
In: Demonstrations at the University Booth of the DATE Conference 2001 <2001, München>: Proceedings. - Tübingen: Wilhelm-Schickard-Inst. für Informatik, 2001, Tübingen, Wilhelm-Schickard-Inst. für Informatik, [Conference or Workshop Item]

Becker, Jürgen ; Liebau, N. ; Pionteck, T. ; Glesner, M. (2001):
Efficient mapping of pre-synthesized IP-cores onto dynamically reconfigurable array architectures.
In: International Conference on Field Programmable Logic and Applications <11, 2001, Belfast>: Proceedings, [Conference or Workshop Item]

Becker, Jürgen ; Pionteck, T. ; Glesner, M. (2001):
Effiziente IP-basierte Abbildungsverfahren für dynamisch-rekonfigurierbare Array-Architekturen.
In: E.I.S. Workshop: ITG/GI/GMM-Workshop Entwurf Integrierter Schaltungen und Systeme <10, 2001, Dresden>; Tagungsbd., [Conference or Workshop Item]

Becker, Jürgen ; Pionteck, T. ; Glesner, M. (2001):
Simulation, prototyping and reconfigurable hardware realization of CDMA RAKE-receiver algorithms for flexible mobile transceivers.
In: ERSA'01: Engineering of Reconfigurable Systems and Algorithms <2001, Las Vegas, Nevada>; Proceedings, [Conference or Workshop Item]

Becker, Jürgen ; Schmidt, (1998):
Automatic parallelism exploitation for FPL-based accelerators.
In: HICSS-31: Hawaii International Conference on System Sciences <31, 1998, Hawaii>: Proceedings, [Conference or Workshop Item]

Becker, Jürgen ; Kirschbaum, ; Renner, ; Glesner, (1998):
Internet-based training of reconfigurable technologies.
In: SBCCI: Brazilian Symposium on Integrated Circuit Design <11, 1998, Buzios, Brasil>: Proceedings, [Conference or Workshop Item]

Becker, Jürgen ; Hartenstein, ; Herz, ; Nageldinger, (1998):
Parallelization in co-compilation for configurable accelerators.
In: ASP-DAC98: Asia and South Pacific Design Automation Conference <3, 1998, Yokohama>: Proceedings, [Conference or Workshop Item]

Becker, Jürgen ; Renner, ; Glesner, (1998):
Perspectives of reconfigurable computing in education.
In: EWME: European Workshop on Microelectronics Education <2, 1998, Noordwijkerhout>: Proceedings, [Conference or Workshop Item]

Becker, Jürgen ; Kirschbaum, ; Renner, ; Glesner, (1998):
Perspectives of reconfigurable computing in research, industry and education.
In: FPL: International Workshop on Field Programmable Logic and Applications <8, 1998, Tallinn>: Proceedings, [Conference or Workshop Item]

Becker, Jürgen ; Hartenstein, (1998):
Real-time prototyping in microprocessor /accelerator symbiosis.
In: RSP98: IEEE International Workshop on Rapid System Prototyping <9,1998, Leuven>: Proceedings, [Conference or Workshop Item]

Becker, Jürgen (1998):
The impact of reconfigurable hardware platforms on the overhead in parallelism.
201, In: Dynamically reconfigurable architectures. Hrsg.: K.-H. Brenner, Saarbrücken: Dagstuhl, 1998, Saarbrücken, Dagstuhl, [Book Section]

This list was generated on Sat Sep 25 01:41:12 2021 CEST.