Blank, C. ; Ritter, G. ; Hinrichsen, H. ; Eveking, H. (2000)
Formale Verifikation der Register-Allokation.
Conference or Workshop Item, Bibliographie

Eveking, Hans ; Hinrichsen, H. ; Ritter, G. (1999)
Automatic verification of scheduling results in high-level synthesis.
Conference or Workshop Item, Bibliographie

Ritter, Gerd ; Hinrichsen, H. ; Eveking, H. (1999)
Formal verification of descriptions with distinct order of memory operations.
Conference or Workshop Item, Bibliographie

Ritter, Gerd ; Eveking, H. ; Hinrichsen, H. (1999)
Formal verification of designs with complex control by symbolic simulation.
Conference or Workshop Item, Bibliographie

Ritter, Gerd ; Hinrichsen, H. ; Eveking, H. (1999)
Formale Verifikation automatisch generierter Pipelinesysteme durch symbolische Simulation.
Conference or Workshop Item, Bibliographie