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Group by: No Grouping | Item Type | Date | Language
Number of items: 44.

Hardieck, Martin ; Lens, Dieter ; Groß, Kerstin ; Klingbeil, Harald ; Kumm, Martin ; Zipf, Peter (2018)
Signal processing hardware for single-bunch manipulation.
Report, Bibliographie

Lens, Dieter ; Hardieck, Martin ; Groß, Kerstin ; Kumm, Martin ; Zipf, Peter (2017)
Signal processing development for the SIS100 bunch-by-bunch longitudinal feedback.
Report, Bibliographie

Möller, Konrad ; Kumm, Martin ; Zipf, Peter ; Groß, Kerstin ; Lens, Dieter ; Klingbeil, Harald (2014)
FPGA based tunable digital filtering for closed loop RF control in synchrotrons.
Report, Bibliographie

Kumm, Martin ; Klingbeil, Harald ; Zipf, Peter (2010)
An FPGA-Based Linear All-Digital Phase-Locked Loop.
In: Circuits and Systems I: Regular Papers, IEEE Transactions on, 57 (9)
Article, Bibliographie

Zipf, Peter ; Hinkelmann, Heiko ; Missel, Felix ; Glesner, Manfred (2007)
A Customizable LEON2-Based VLIW Processor.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Liu, Lei ; Bozakov, Z. ; Glesner, Manfred (2007)
Design Optimisations for a Cellular Automata Model with Programmable Interconnect Structure.
Conference or Workshop Item, Bibliographie

Hinkelmann, Heiko ; Zipf, Peter ; Glesner, Manfred (2007)
A Domain-Specific Dynamically Reconfigurable Hardware Platform for Wireless Sensor Networks.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Qiao, Y. ; Glesner, Manfred (2007)
Ein Beitrag zur automatischen Erzeugung dynamisch rekonfigurierbarer Hardwarestrukturen.
Conference or Workshop Item, Bibliographie

Hinkelmann, Heiko ; Murgan, T. ; Liu, G. ; Zipf, Peter ; Glesner, Manfred (2007)
On the Design of a Reconfigurable Multiplier for Integer and Galois Field Multiplication.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Hinkelmann, Heiko ; Deng, Lei ; Glesner, Manfred ; Blume, H. ; Noll, T. G. (2007)
A Power Estimation Model for an FPGA-based Softcore Processor.
Conference or Workshop Item, Bibliographie

Glesner, Manfred ; Murgan, T. ; Hollstein, T. ; Zipf, Peter ; Soffke, O. ; Hinkelmann, Heiko (2007)
System Design Challenges in the Nanoscale Era.
In: Scientific Bulletin of the Faculty of Electronics, Telecommunications and Informatics, Gdansk Univ. of Technology - Information Technology Series, volume 12, pages 3-14, 2007.
Article, Bibliographie

Guntoro, Andre ; Zipf, Peter ; Soffke, Oliver ; Klingbeil, Harald ; Kumm, Martin ; Glesner, Manfred (2006)
Applications - Implementation of Realtime and Highspeed Phase Detector on FPGA.
Conference or Workshop Item, Bibliographie

Glesner, Manfred ; Soffke, Oliver ; Zipf, Peter (2006)
Hardware Architectures for the Evolution of Cellular Automata Functionality.
In: Complex computing networks : brain-like and wave-oriented electrodynamic algorithms / I. C. Göknar ... (ed.). - Berlin [u.a.] : Springer, 2006, S. 257-266 (Springer proceedings in physics ; 104) ISBN 3-540-30635-8
Book Section, Bibliographie

Guntoro, Andre ; Zipf, Peter ; Soffke, Oliver ; Klingbeil, Harald ; Kumm, Martin ; Glesner, Manfred (2006)
Implementation of realtime and highspeed phase detector on FPGA.
Conference or Workshop Item, Bibliographie

Belchior, Marcos Aurelio ; Wullfert, Kyra ; Zipf, Peter ; Glesner, Manfred (2006)
Simulated Annealing Algorithms for Optimal Packet Scheduling in Ad Hoc Networks.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Soffke, Oliver ; Velten, Michael ; Glesner, Manfred (2005)
Abstrakte Modellierung der Eigenschaften von nanoelektronischen CNT-Elementen in Systeme.
Conference or Workshop Item, Bibliographie

Cotofana, S. ; Schmid, A. ; Leblebici, Y. ; Ionescu, A. ; Soffke, Oliver ; Zipf, Peter ; Glesner, Manfred ; Rubio, A. (2005)
Conan - a design exploration framework for reliable nano-electronics architectures.
Conference or Workshop Item, Bibliographie

Murgan, Tudor ; Obeid, Abdulfattah M. ; Guntoro, André ; Zipf, Peter ; Glesner, Manfred ; Heinkel, Ulrich (2005)
Design and implementation of a multi-core architecture for overhead processing in optical transport networks.
Conference or Workshop Item, Bibliographie

Petrov, Mihail ; Murgan, Tudor ; Zipf, Peter ; Glesner, Manfred (2005)
Functional modeling techniques for a wireless LAN OFDM transceiver.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Soffke, Oliver ; Schumacher, André ; Dogaru, Radu ; Glesner, Manfred (2005)
On a hardware architecture for the evolution of cellular automata functionality.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Soffke, Oliver ; Schumacher, André ; Dogaru, Radu ; Glesner, Manfred (2005)
Programmable and reconfigurable hardware architectures for the rapid prototyping of cellular automata.
Conference or Workshop Item, Bibliographie

Glesner, Manfred ; Hinkelmann, Heiko ; Hollstein, Thomas ; Indrusiak, Leandro Soares ; Murgan, Tudor ; Obeid, Abdulfattah M. ; Petrov, Mihail ; Pionteck, Thilo ; Zipf, Peter (2005)
Reconfigurable embedded systems : an application-oriented perspective on architectures and design techniques.
Conference or Workshop Item, Bibliographie

Soffke, Oliver ; Zipf, Peter ; Glesner, Manfred (2005)
Simulation von CNFET basierten Digitalschaltungen.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Soffke, Oliver ; Schumacher, André ; Schlachta, Clemens ; Dogaru, Radu ; Glesner, Manfred (2005)
A hardware-in-the-loop system to evaluate the performance of small-world cellular automata.
Conference or Workshop Item, Bibliographie

Murgan, Tudor ; Petrov, Mihail ; Majer, Mateusz ; Zipf, Peter ; Glesner, Manfred ; Heinkel, Ulrich ; Pleickhardt, Joerg ; Bleisteiner, Bernd (2004)
Adaptive architectures for an OTN processor : reducing design costs through reconfigurability and multiprocessing.
Conference or Workshop Item, Bibliographie

Petrov, Mihail ; Murgan, Tudor ; Obeid, Abdulfattah M. ; Chitu, Cristian ; Zipf, Peter ; Brakensiek, Jörg ; Glesner, Manfred (2004)
Dynamic power optimization of the trace-back process for the Viterbi algorithm.
Conference or Workshop Item, Bibliographie

Murgan, Tudor ; Petrov, Mihail ; Majer, Mateusz ; Zipf, Peter ; Glesner, Manfred ; Heinkel, Ulrich (2004)
Flexible overhead processing architectures for G.709 optical transport networks.
Conference or Workshop Item, Bibliographie

Ludewig, Ralf ; Soffke, Oliver ; Zipf, Peter ; Glesner, Manfred ; Pun, Kong Pang ; Tsoi, Kuen Hung ; Lee, Kin Hong ; Leong, Philip (2004)
IP generation for an FPGA-based audio DAC sigma-delta converter.
Conference or Workshop Item, Bibliographie

Glesner, Manfred ; Hollstein, Thomas ; Indrusiak, Leandro Soares ; Zipf, Peter ; Pionteck, Thilo ; Petrov, Mihail ; Zimmer, Heiko ; Murgan, Tudor (2004)
Reconfigurable platforms for ubiquitous computing.
Conference or Workshop Item, Bibliographie

Petrov, Mihail ; Murgan, Tudor ; May, F. ; Vorbach, M. ; Zipf, Peter ; Glesner, Manfred (2004)
The XPP architecture and its co-simulation within the Simulink environment.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Hinkelmann, Heiko ; Ashraf, Adeel ; Hollstein, Thomas ; Glesner, Manfred (2004)
An asynchronous switch implementation for systems-on-a-chip.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Stötzler, Claude ; Glesner, Manfred (2004)
A configurable pipelined state machine as a hybrid ASIC and configurable architecture.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Hinkelmann, Heiko ; Ashraf, Adeel ; Glesner, Manfred (2004)
A switch architecture and signal synchronization for GALS system-on-chips.
Conference or Workshop Item, Bibliographie

Murgan, Tudor ; Petrov, Mihail ; Garcia Ortiz, Alberto ; Ludewig, Ralf ; Zipf, Peter ; Hollstein, Thomas ; Glesner, Manfred ; Oelkrug, Bernhard ; Brakensiek, Jörg (2003)
Evaluation and run-time optimization of on-chip communication structures in reconfigurable architectures.
Conference or Workshop Item, Bibliographie

Pandey, Sujan ; Zipf, Peter ; Soffke, Oliver ; Glesner, Manfred (2003)
Ubicomp device for a decentralized distributed computing environment.
Conference or Workshop Item, Bibliographie

Petrov, Mihail ; Obeid, Abdulfattah M. ; Murgan, Tudor ; Brakensiek, Jörg ; Zipf, Peter ; Glesner, Manfred (2003)
An adaptive trace-back solution for state-parallel Viterbi decoders.
Conference or Workshop Item, Bibliographie

Bingemer, Stephan ; Zipf, Peter ; Glesner, Manfred (2003)
A granularity-based classification model for systems-on-a-chip.
doi: 10.1145/611817.611859
Conference or Workshop Item, Bibliographie

Hollstein, Thomas ; Ludewig, Ralf ; Mager, Christoph ; Zipf, Peter ; Glesner, Manfred (2003)
A hierarchical generic approach for on-chip communication, testing and debugging of SoCs.
Conference or Workshop Item, Bibliographie

Pandey, Sujan ; Zipf, Peter ; Soffke, Oliver ; Petrov, Mihail ; Murgan, Tudor ; Glesner, Manfred ; Mühlhäuser, Max (2003)
An infrastructure for distributed computing and context aware computing.
Conference or Workshop Item, Bibliographie

Bingemer, Stephan ; Zipf, Peter ; Glesner, Manfred (2003)
An integrated model bridging the gap between technology and economy.
Conference or Workshop Item, Bibliographie

Ho, C. H. ; Leong, P. H. W. ; Tsoi, Kuen Hung ; Ludewig, Ralf ; Zipf, Peter ; Garcia Ortiz, Alberto ; Glesner, Manfred (2002)
Fly - a modifiable hardware compiler.
Conference or Workshop Item, Bibliographie

Zipf, Peter ; Glesner, Manfred ; Bauer, C. ; Wojtkowiak, H. (2002)
Handling FPGA faults and configuration sequencing using a hardware extension.
Conference or Workshop Item, Bibliographie

Glesner, Manfred ; Kabulepa, Lukusa D. ; Pionteck, Thilo ; Mitrea, Octavian ; Ocampo Hidalgo, Juan Jesus ; Zipf, Peter (2002)
Integration monolithischer CMOS Schaltungen für Mobilfunkanwendungen : Entwurfsmethoden und Herausforderungen.
In: Eingebettete Systeme : Entwurf und Anwendungen versteckter Computer.- Darmstadt, 2002.- (Thema Forschung ; 2002,1).- S. 90-95
Article, Bibliographie

Pionteck, Thilo ; Zipf, Peter ; Kabulepa, Lukusa D. ; Glesner, Manfred (2002)
A framework for teaching (re)configurable architectures in student projects.
Conference or Workshop Item, Bibliographie

This list was generated on Tue Feb 20 00:20:17 2024 CET.