2006

Pandey, S. ; Murgan, T. ; Glesner, Manfred (2006)
Energy Conscious Simultaneous Voltage Scaling and On-Chip Communication Bus Synthesis.
Konferenzveröffentlichung, Bibliographie

Pandey, S. ; Glesner, Manfred (2006)
Energy Efficient MPSoC On-chip Communication Bus Synthesis Using Voltage Scaling Technique.
Konferenzveröffentlichung, Bibliographie

Pandey, S. ; Glesner, Manfred (2006)
Energy Efficient Statistical On-Chip Communication Bus Synthesis for Reconfigurable Architecture.
Konferenzveröffentlichung, Bibliographie

Murgan, T. ; Mitea, O. ; Pandey, S. ; Bacinschi, P. B. ; Glesner, Manfred (2006)
Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters.
Konferenzveröffentlichung, Bibliographie

Pandey, S. ; Glesner, Manfred (2006)
Statistical On-Chip Communication Bus Synthesis and Voltage Scaling Under Timing Yield Constraint.
Konferenzveröffentlichung, Bibliographie

Pandey, S. ; Utlu, Nurten ; Glesner, Manfred (2006)
Tabu Search Based On-Chip Communication Bus Synthesis for Shared Multi-Bus Based Architecture.
Konferenzveröffentlichung, Bibliographie