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McCarn Deiana, Allison ; Tran, Nhan ; Agar, Joshua ; Blott, Michaela ; Di Guglielmo, Giuseppe ; Duarte, Javier ; Harris, Philip ; Hauck, Scott ; Liu, Mia ; Neubauer, Mark S. ; Ngadiuba, Jennifer ; Ogrenci-Memik, Seda ; Pierini, Maurizio ; Aarrestad, Thea ; Bähr, Steffen ; Becker, Jürgen ; Berthold, Anne-Sophie ; Bonventre, Richard J. ; Müller Bravo, Tomás E. ; Diefenthaler, Markus ; Dong, Zhen ; Fritzsche, Nick ; Gholami, Amir ; Govorkova, Ekaterina ; Guo, Dongning ; Hazelwood, Kyle J. ; Herwig, Christian ; Khan, Babar ; Kim, Sehoon ; Klijnsma, Thomas ; Liu, Yaling ; Lo, Kin Ho ; Nguyen, Tri ; Pezzullo, Gianantonio ; Rasoulinezhad, Seyedramin ; Rivera, Ryan A. ; Scholberg, Kate ; Selig, Justin ; Sen, Sougata ; Strukov, Dmitri ; Tang, William ; Thais, Savannah ; Unger, Kai Lukas ; Vilalta, Ricardo ; Krosigk, Belina von ; Wang, Shen ; Warburton, Thomas K. (2022)
Applications and Techniques for Fast Machine Learning in Science.
In: Frontiers in Big Data, 5
doi: 10.3389/fdata.2022.787421
Article, Bibliographie
Reuter, Maximilian ; Pfau, Johannes ; Krauss, Tillmann A. ; Becker, Jürgen ; Hofmann, Klaus (2020)
From MOSFETs to Ambipolar Transistors: Standard Cell Synthesis for the Planar RFET Technology.
In: IEEE Transactions on Circuits and Systems I: Regular Papers
doi: 10.1109/TCSI.2020.3035889
Article, Bibliographie
Pfau, Johannes ; Reuter, Maximilian ; Hofmann, Klaus ; Becker, Jürgen (2020)
Designing Universal Logic Module FPGA Architectures for Use With Ambipolar Transistor Technology.
2020 International Conference on Field-Programmable Technology. Maui, USA (09.12.2020-11.12.2020)
doi: 10.1109/ICFPT51103.2020.00031
Conference or Workshop Item, Bibliographie
Halbach, Mathias ; Hoffmann, Rolf
eds.: Karl, Wolfgang ; Becker, Jürgen ; Großpietsch, Karl-Erwin ; Hochberger, Christian ; Maehle, Erik (2006)
Minimising the Hardware Resources for a Cellular Automaton with Moving
Creatures.
Conference or Workshop Item, Bibliographie
Halbach, Mathias ; Hoffmann, Rolf ; Röder, Patrick
eds.: Brinkschulte, Uwe ; Becker, Jürgen ; Fey, Dietmar ; Großpietsch, Karl-Erwin ; Hochberger, Christian ; Maehle, Erik ; Runkler, Thomas (2004)
{FPGA} Implementation of Cellular Automata Compared to Software Implementation.
Conference or Workshop Item, Bibliographie
Indrusiak, Leandro Soares ; Becker, Jürgen ; Glesner, Manfred ; Reis, Ricardo (2002)
Distributed collaborative design over cave2 framework.
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Piontek, T. ; Glesner, M. (2001)
Adaptive systems-on-chip: Architectures, technologies and applications.
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Pionteck, T. ; Glesner, M. (2001)
Design and implementation of a coarse-grained dynamically reconfigurable hardware architecture.
Conference or Workshop Item, Bibliographie
Indrusiak, Leandro Soares ; Hernandez, E. B. ; Sawicki, S. ; Reis, Ricardo ; Becker, Jürgen ; Glesner, Manfred (2001)
Distributed system-level design using pair-programming over Cave.
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Liebau, N. ; Pionteck, T. ; Glesner, M. (2001)
Efficient mapping of pre-synthesized IP-cores onto dynamically reconfigurable array architectures.
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Pionteck, T. ; Glesner, M. (2001)
Effiziente IP-basierte Abbildungsverfahren für dynamisch-rekonfigurierbare Array-Architekturen.
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Pionteck, T. ; Glesner, M. (2001)
Simulation, prototyping and reconfigurable hardware realization of CDMA RAKE-receiver algorithms for flexible mobile transceivers.
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Schmidt, (1998)
Automatic parallelism exploitation for FPL-based accelerators.
Conference or Workshop Item, Bibliographie
Hollstein, Thomas ; Becker, Jürgen ; Kirschbaum, Andreas ; Renner, Frank-Michael ; Glesner, Manfred (1998)
DICE: an interactive approach to hardware/software co-design of heterogeneous real-time systems.
6'th biennial Baltic Electronics Conference (BEC '98). Tallinn, Estonia (07.10.1998-09.10.1998)
Conference or Workshop Item, Bibliographie
Hollstein, Thomas ; Becker, Jürgen ; Kirschbaum, Andreas ; Glesner, Manfred (1998)
HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems.
Sixth International Workshop on Hardware/Software Codesign. (CODES/CASHE'98),. Seattle, WA, USA (18.03.1998-18.03.1998)
doi: 10.1109/HSC.1998.666234
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Kirschbaum, Andreas ; Renner, Frank-Michael ; Glesner, Manfred (1998)
Internet-based training of reconfigurable technologies.
11. Brazilian Symposium on Integrated Circuit Design (SBCCI). Buzios, Brasil (03.10.1998-03.10.1998)
doi: 10.1109/SBCCI.1998.715404
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Hartenstein, R. ; Herz, M. ; Nageldinger, U. (1998)
Parallelization in co-compilation for configurable accelerators.
3rd ASP-DAC. Yokohama (10.02.1998-13.02.1998)
doi: 10.1109/ASPDAC.1998.669393
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Renner, Frank-Michael ; Glesner, Manfred
ed.: Mouthaan, Ton J. (1998)
Perspectives of reconfigurable computing in education.
2. EWME: European Workshop on Microelectronics Education. Noordwijkerhout, Netherlands (14.05.1998-15.05.1998)
doi: 10.1007/978-94-011-5110-8_68
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Kirschbaum, Andreas ; Renner, Frank-Michael ; Glesner, Manfred
ed.: Hartenstein, R. W. (1998)
Perspectives of reconfigurable computing in research, industry and education.
FPL: International Workshop on Field Programmable Logic and Applications. Tallinn, Estonia
doi: 10.1007/BFb0055231
Conference or Workshop Item, Bibliographie
Becker, Jürgen ; Hartenstein, R. (1998)
Real-time prototyping in microprocessor /accelerator symbiosis.
Ninth International Workshop on Rapid System Prototyping. Leuven, Belgium (03.06.1998-05.06.1998)
doi: 10.1109/IWRSP.1998.676665
Conference or Workshop Item, Bibliographie
Le, Thuyen ; Dombek, T. ; Becker, Jürgen ; Glesner, Manfred (1998)
A flexible approach and VLSI architecture for computing discrete time-frequency distribution.
IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation. Cambridge, MA, USA (10.10.1998-10.10.1998)
doi: 10.1109/SIPS.1998.715781
Conference or Workshop Item, Bibliographie
Becker, Jürgen (1998)
The impact of reconfigurable hardware platforms on the overhead in parallelism.
In: Dynamically reconfigurable architectures, Edition: Saarbrücken: Dagstuhl, 1998
Book Section, Bibliographie