Heinz, Carsten ; Hofmann, Jaco ; Korinth, Jens ; Sommer, Lukas ; Weber, Lukas ; Koch, Andreas (2024)
The TaPaSCo Open-Source Toolflow: for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems.
In: Journal of Signal Processing Systems, 2021, 93 (5)
doi: 10.26083/tuprints-00023535
Artikel, Zweitveröffentlichung, Verlagsversion
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Kurzbeschreibung (Abstract)
The integration of FPGA-based accelerators into a complete heterogeneous system is a challenging task faced by many researchers and engineers, especially now that FPGAs enjoy increasing popularity as implementation platforms for efficient, application-specific accelerators for domains such as signal processing, machine learning and intelligent storage. To lighten the burden of system integration from the developers of accelerators, the open-source TaPaSCo framework presented in this work provides an automated toolflow for the construction of heterogeneous many-core architectures from custom processing elements, and a simple, uniform programming interface to utilize spatially distributed, parallel computation on FPGAs. TaPaSCo aims to increase the scalability and portability of FPGA designs through automated design space exploration, greatly simplifying the scaling of hardware designs and facilitating iterative growth and portability across FPGA devices and families. This work describes TaPaSCo with its primary design abstractions and shows how TaPaSCo addresses portability and extensibility of FPGA hardware designs for systems-on-chip. A study of successful projects using TaPaSCo shows its versatility and can serve as inspiration and reference for future users, with more details on the usage of TaPaSCo presented in an in-depth case study and a short overview of the workflow.
| Typ des Eintrags: | Artikel |
|---|---|
| Erschienen: | 2024 |
| Autor(en): | Heinz, Carsten ; Hofmann, Jaco ; Korinth, Jens ; Sommer, Lukas ; Weber, Lukas ; Koch, Andreas |
| Art des Eintrags: | Zweitveröffentlichung |
| Titel: | The TaPaSCo Open-Source Toolflow: for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems |
| Sprache: | Englisch |
| Publikationsjahr: | 10 Dezember 2024 |
| Ort: | Darmstadt |
| Publikationsdatum der Erstveröffentlichung: | Mai 2021 |
| Ort der Erstveröffentlichung: | Norwell, Mass. |
| Verlag: | Springer |
| Titel der Zeitschrift, Zeitung oder Schriftenreihe: | Journal of Signal Processing Systems |
| Jahrgang/Volume einer Zeitschrift: | 93 |
| (Heft-)Nummer: | 5 |
| DOI: | 10.26083/tuprints-00023535 |
| URL / URN: | https://tuprints.ulb.tu-darmstadt.de/23535 |
| Zugehörige Links: | |
| Herkunft: | Zweitveröffentlichung DeepGreen |
| Kurzbeschreibung (Abstract): | The integration of FPGA-based accelerators into a complete heterogeneous system is a challenging task faced by many researchers and engineers, especially now that FPGAs enjoy increasing popularity as implementation platforms for efficient, application-specific accelerators for domains such as signal processing, machine learning and intelligent storage. To lighten the burden of system integration from the developers of accelerators, the open-source TaPaSCo framework presented in this work provides an automated toolflow for the construction of heterogeneous many-core architectures from custom processing elements, and a simple, uniform programming interface to utilize spatially distributed, parallel computation on FPGAs. TaPaSCo aims to increase the scalability and portability of FPGA designs through automated design space exploration, greatly simplifying the scaling of hardware designs and facilitating iterative growth and portability across FPGA devices and families. This work describes TaPaSCo with its primary design abstractions and shows how TaPaSCo addresses portability and extensibility of FPGA hardware designs for systems-on-chip. A study of successful projects using TaPaSCo shows its versatility and can serve as inspiration and reference for future users, with more details on the usage of TaPaSCo presented in an in-depth case study and a short overview of the workflow. |
| Freie Schlagworte: | FPGA, Reconfigurable computing, Design space exploration, System-on-Chip design, Design automation, High-level synthesis, Scalability, Portability, TaPaSCo, Heterogeneous computing, Parallel computing, RISC-V |
| Status: | Verlagsversion |
| URN: | urn:nbn:de:tuda-tuprints-235355 |
| Zusätzliche Informationen: | Part of a collection: Computer Science SDG 7: Affordable and Clean Energy |
| Sachgruppe der Dewey Dezimalklassifikatin (DDC): | 000 Allgemeines, Informatik, Informationswissenschaft > 004 Informatik |
| Fachbereich(e)/-gebiet(e): | 20 Fachbereich Informatik 20 Fachbereich Informatik > Eingebettete Systeme und ihre Anwendungen |
| Hinterlegungsdatum: | 10 Dez 2024 12:59 |
| Letzte Änderung: | 16 Jan 2025 12:08 |
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| Suche nach Titel in: | TUfind oder in Google |
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- The TaPaSCo Open-Source Toolflow: for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems. (deposited 10 Dez 2024 12:59) [Gegenwärtig angezeigt]
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