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Evaluation and run-time optimization of on-chip communication structures in reconfigurable architectures

Murgan, Tudor ; Petrov, Mihail ; Garcia Ortiz, Alberto ; Ludewig, Ralf ; Zipf, Peter ; Hollstein, Thomas ; Glesner, Manfred ; Oelkrug, Bernhard ; Brakensiek, Jörg (2003):
Evaluation and run-time optimization of on-chip communication structures in reconfigurable architectures.
In: Field-programmable logic and applications : 13th international conference ; proceedings / FPL 2003, Lisbon, Portugal, September 1 - 3, 2003. Peter Y. K. Cheung ... (ed.)- Berlin [u.a.] : Springer, 2003.- XXVI, 1179 S. : graph. Darst.- (Lecture notes in co, [Conference or Workshop Item]

Item Type: Conference or Workshop Item
Erschienen: 2003
Creators: Murgan, Tudor ; Petrov, Mihail ; Garcia Ortiz, Alberto ; Ludewig, Ralf ; Zipf, Peter ; Hollstein, Thomas ; Glesner, Manfred ; Oelkrug, Bernhard ; Brakensiek, Jörg
Title: Evaluation and run-time optimization of on-chip communication structures in reconfigurable architectures
Language: English
Series: Field-programmable logic and applications : 13th international conference ; proceedings / FPL 2003, Lisbon, Portugal, September 1 - 3, 2003. Peter Y. K. Cheung ... (ed.)- Berlin [u.a.] : Springer, 2003.- XXVI, 1179 S. : graph. Darst.- (Lecture notes in co
Divisions: 18 Department of Electrical Engineering and Information Technology
Date Deposited: 20 Nov 2008 08:18
License: [undefiniert]
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