Chen, Chen ; Kande, Rahul ; Mahmoody, Pouya ; Sadeghi, Ahmad-Reza ; Rajendran, JV (2022)
Trusting the trust anchor: towards detecting cross-layer vulnerabilities with hardware fuzzing.
59th ACM/IEEE Design Automation Conference. San Francisco, USA (10.-14.07.2022)
doi: 10.1145/3489517.3530638
Conference or Workshop Item, Bibliographie
Abstract
The rise in the development of complex and application-specific commercial and open-source hardware and the shrinking verification time are causing numerous hardware-security vulnerabilities. Traditional verification techniques are limited in both scalability and completeness. Research in this direction is hindered due to the lack of robust testing benchmarks. In this paper, in collaboration with our industry partners, we built an ecosystem mimicking the hardware-development cycle where we inject bugs inspired by real-world vulnerabilities into RISC-V SoC design and organized an open-to-all bug-hunting competition. We equipped the participating researchers with industry-standard static and dynamic verification tools in a ready-to-use environment. The findings from our competition shed light on the strengths and weaknesses of the existing verification tools and highlight the potential for future research in developing new vulnerability detection techniques.
| Item Type: | Conference or Workshop Item |
|---|---|
| Erschienen: | 2022 |
| Creators: | Chen, Chen ; Kande, Rahul ; Mahmoody, Pouya ; Sadeghi, Ahmad-Reza ; Rajendran, JV |
| Type of entry: | Bibliographie |
| Title: | Trusting the trust anchor: towards detecting cross-layer vulnerabilities with hardware fuzzing |
| Language: | English |
| Date: | 23 August 2022 |
| Publisher: | ACM |
| Book Title: | DAC'22: Proceedings of the 59th ACM/IEEE Design Automation Conference |
| Event Title: | 59th ACM/IEEE Design Automation Conference |
| Event Location: | San Francisco, USA |
| Event Dates: | 10.-14.07.2022 |
| DOI: | 10.1145/3489517.3530638 |
| Abstract: | The rise in the development of complex and application-specific commercial and open-source hardware and the shrinking verification time are causing numerous hardware-security vulnerabilities. Traditional verification techniques are limited in both scalability and completeness. Research in this direction is hindered due to the lack of robust testing benchmarks. In this paper, in collaboration with our industry partners, we built an ecosystem mimicking the hardware-development cycle where we inject bugs inspired by real-world vulnerabilities into RISC-V SoC design and organized an open-to-all bug-hunting competition. We equipped the participating researchers with industry-standard static and dynamic verification tools in a ready-to-use environment. The findings from our competition shed light on the strengths and weaknesses of the existing verification tools and highlight the potential for future research in developing new vulnerability detection techniques. |
| Divisions: | 20 Department of Computer Science 20 Department of Computer Science > Theoretische Informatik 20 Department of Computer Science > System Security Lab Profile Areas Profile Areas > Cybersecurity (CYSEC) |
| Date Deposited: | 18 Apr 2023 07:13 |
| Last Modified: | 18 Apr 2023 07:13 |
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