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Survey of Methods to Improve Side-Channel Resistance on Partial Reconfigurable Platforms

Stoettinger, Marc ; Malipatlolla, Sunil ; Tian, Qizhi (2010)
Survey of Methods to Improve Side-Channel Resistance on Partial Reconfigurable Platforms.
Konferenzveröffentlichung, Bibliographie

Kurzbeschreibung (Abstract)

In this survey we introduce a few secure hardware implementation methods for FPGA platforms in the context of side-channel analysis. Side-channel attacks may exploit data-dependent physical leakage to estimate secret parameters like a cryptographic key. In particular, IP-cores for security applications on

embedded systems equippe with FPGAs have to be made secure against these attacks. Thus, we discuss how the countermeasures, known from literature, can be applied on FPGA-based systems to improve the side-channel resistance. After introducing the reader to the FPGA technology and the FPGA reconfiguration workflow, we discuss the hiding-based countermeasure against power analysis attacks especially designed for reconfigurable FPGAs.

Typ des Eintrags: Konferenzveröffentlichung
Erschienen: 2010
Autor(en): Stoettinger, Marc ; Malipatlolla, Sunil ; Tian, Qizhi
Art des Eintrags: Bibliographie
Titel: Survey of Methods to Improve Side-Channel Resistance on Partial Reconfigurable Platforms
Sprache: Englisch
Publikationsjahr: 2010
Verlag: Springer
Buchtitel: Design Methodologies for Secure Embedded Systems
Reihe: Lecture Notes in Electrical Engineering
Band einer Reihe: 78.
Kurzbeschreibung (Abstract):

In this survey we introduce a few secure hardware implementation methods for FPGA platforms in the context of side-channel analysis. Side-channel attacks may exploit data-dependent physical leakage to estimate secret parameters like a cryptographic key. In particular, IP-cores for security applications on

embedded systems equippe with FPGAs have to be made secure against these attacks. Thus, we discuss how the countermeasures, known from literature, can be applied on FPGA-based systems to improve the side-channel resistance. After introducing the reader to the FPGA technology and the FPGA reconfiguration workflow, we discuss the hiding-based countermeasure against power analysis attacks especially designed for reconfigurable FPGAs.

Freie Schlagworte: Design Methodologies, Embedded Systems, Security
Fachbereich(e)/-gebiet(e): 20 Fachbereich Informatik
Hinterlegungsdatum: 31 Dez 2016 00:15
Letzte Änderung: 16 Mai 2018 12:47
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