Mühlbach, Sascha ; Koch, Andreas (2012)
Malacoda: towards high-level compilation of network security applications on reconfigurable hardware.
Austin, Texas, USA
doi: 10.1145/2396556.2396604
Konferenzveröffentlichung, Bibliographie
Kurzbeschreibung (Abstract)
While the use of reconfigurable computing for tasks such as packet header processing or deep packet-inspection in high-speed networks has been widely studied, efforts to extend the technology to application-level processing have only recently been made. One issue that has prevented wider use of reconfigurable platforms in that context is the unfamiliar programming environment: Such systems commonly require expertise in computer architecture and digital logic design generally foreign to networking experts. To make the technology more accessible to potential users, we present the high-level domain-specific language Malacoda for application-level network processing and an associated compiler that automatically translates Malacoda descriptions into high-performance hardware blocks for insertion into an FPGA-based processing platform. We evaluate our approach on the use-case of a hardware-accelerated secure honeypot-in-a-box, programmed in Malacoda, and implemented on the NetFPGA 10G board. Results from a live-test of the system connected to a 10G Internet uplink complete the evaluation.
| Typ des Eintrags: | Konferenzveröffentlichung |
|---|---|
| Erschienen: | 2012 |
| Autor(en): | Mühlbach, Sascha ; Koch, Andreas |
| Art des Eintrags: | Bibliographie |
| Titel: | Malacoda: towards high-level compilation of network security applications on reconfigurable hardware |
| Sprache: | Deutsch |
| Publikationsjahr: | Oktober 2012 |
| Verlag: | ACM |
| Buchtitel: | Proceedings of the eighth ACM/IEEE symposium on Architectures for networking and communications systems |
| Reihe: | ANCS '12 |
| Veranstaltungsort: | Austin, Texas, USA |
| DOI: | 10.1145/2396556.2396604 |
| Kurzbeschreibung (Abstract): | While the use of reconfigurable computing for tasks such as packet header processing or deep packet-inspection in high-speed networks has been widely studied, efforts to extend the technology to application-level processing have only recently been made. One issue that has prevented wider use of reconfigurable platforms in that context is the unfamiliar programming environment: Such systems commonly require expertise in computer architecture and digital logic design generally foreign to networking experts. To make the technology more accessible to potential users, we present the high-level domain-specific language Malacoda for application-level network processing and an associated compiler that automatically translates Malacoda descriptions into high-performance hardware blocks for insertion into an FPGA-based processing platform. We evaluate our approach on the use-case of a hardware-accelerated secure honeypot-in-a-box, programmed in Malacoda, and implemented on the NetFPGA 10G board. Results from a live-test of the system connected to a 10G Internet uplink complete the evaluation. |
| Freie Schlagworte: | Hardware, Protocols, Security, Routing, Internet, Context, Hardware design languages |
| ID-Nummer: | TUD-CS-2012-0384 |
| Fachbereich(e)/-gebiet(e): | Profilbereiche > Cybersicherheit (CYSEC) Profilbereiche |
| Hinterlegungsdatum: | 28 Aug 2017 14:03 |
| Letzte Änderung: | 15 Mai 2018 10:33 |
| PPN: | |
| Export: | |
| Suche nach Titel in: | TUfind oder in Google |
 |
Frage zum Eintrag |
Optionen (nur für Redakteure)
 |
Redaktionelle Details anzeigen |
Drucken
Impressum