Ning, Jing (2015)
Design of An Integrated High Voltage Controller in CMOS-Technology for Tunable Multiport Microwave Devices.
Technische Universität Darmstadt
Dissertation, Erstveröffentlichung
Kurzbeschreibung (Abstract)
As portable devices are required to operate in different frequency bands and work under changing environ- ment conditions, reconfigurable RF devices, which required high biasing voltages above 100 V , are used in RF frond-end to achieve the multi-bands functionality. The size and cost of discrete circuits are not accept- able for most hand-held devices. Thus, high voltage ASIC, which can be easily integrated and powered by a battery, is a better solution to provide the biasing voltage. High voltage ASIC design is a relatively new field in chip design. To support safe operation voltage above 100 V , sophisticated physical structures with multiple isolation layers, extra drain region and thick oxidation gate are used in high voltage technologies and result in worse performance than designs with low voltage technologies. Thus, chip size, cost, power consumption and performance become the biggest challenges of the proposed design. In this dissertation, two high voltage ASIC designs used to provide the biasing voltage for tunable components in communication systems are proposed. These ASICs can operate with a high voltage power supply generated by an on-chip DC-DC converter. Both designs are simulated in Cadence, implemented in AMS H35 and experimentally tested. The first ASIC is 8-bits high voltage DAC designed in segmented architecture with a Segmented Tran- sistor Only DAC and a high voltage Miller-compensated Amplifier to boost up the output of the low voltage DAC to the expected high voltage. It can provide the biasing voltage for tunable devices up to 115 V with 256 voltage steps. The INL and DNL of the HV DAC are 0.48 LSB and 0.38 LSB, respectively. The power consumption is 18 mW , and the chip size is 3.5 mm2 . The second ASIC is a high voltage controller mainly consisting of 16 HV DACs and a simple digital con- troller. Each HV DAC consists of a Current Steering DAC and a high voltage Miller-compensated Amplifier. It is able to provide 16 individual voltages up to 120 V for different channels of antenna arrays in commu- nication systems. Because of the process and mismatch variations, each HV DAC on the same chip has different performance. Based on the experimental test, the worst INL and DNL of the DACs are 0.98 LSB and 0.52 LSB, respectively. The total power consumption is 120 mW, and the chip size is 10.88 mm2. Besides the experimental test, a demonstrator is built to prove the feasibility to use HV ASICs to apply the required biasing voltage of the tunable components in portable devices. The measurement result is also presented in this dissertation.
Typ des Eintrags: | Dissertation | ||||
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Erschienen: | 2015 | ||||
Autor(en): | Ning, Jing | ||||
Art des Eintrags: | Erstveröffentlichung | ||||
Titel: | Design of An Integrated High Voltage Controller in CMOS-Technology for Tunable Multiport Microwave Devices | ||||
Sprache: | Deutsch | ||||
Referenten: | HOFMANN, Prof. Dr. KLAUS ; JAKOBY, Prof. Dr. ROLF | ||||
Publikationsjahr: | 2015 | ||||
Ort: | Darmstadt | ||||
Datum der mündlichen Prüfung: | 2015 | ||||
URL / URN: | http://tuprints.ulb.tu-darmstadt.de/5453 | ||||
Kurzbeschreibung (Abstract): | As portable devices are required to operate in different frequency bands and work under changing environ- ment conditions, reconfigurable RF devices, which required high biasing voltages above 100 V , are used in RF frond-end to achieve the multi-bands functionality. The size and cost of discrete circuits are not accept- able for most hand-held devices. Thus, high voltage ASIC, which can be easily integrated and powered by a battery, is a better solution to provide the biasing voltage. High voltage ASIC design is a relatively new field in chip design. To support safe operation voltage above 100 V , sophisticated physical structures with multiple isolation layers, extra drain region and thick oxidation gate are used in high voltage technologies and result in worse performance than designs with low voltage technologies. Thus, chip size, cost, power consumption and performance become the biggest challenges of the proposed design. In this dissertation, two high voltage ASIC designs used to provide the biasing voltage for tunable components in communication systems are proposed. These ASICs can operate with a high voltage power supply generated by an on-chip DC-DC converter. Both designs are simulated in Cadence, implemented in AMS H35 and experimentally tested. The first ASIC is 8-bits high voltage DAC designed in segmented architecture with a Segmented Tran- sistor Only DAC and a high voltage Miller-compensated Amplifier to boost up the output of the low voltage DAC to the expected high voltage. It can provide the biasing voltage for tunable devices up to 115 V with 256 voltage steps. The INL and DNL of the HV DAC are 0.48 LSB and 0.38 LSB, respectively. The power consumption is 18 mW , and the chip size is 3.5 mm2 . The second ASIC is a high voltage controller mainly consisting of 16 HV DACs and a simple digital con- troller. Each HV DAC consists of a Current Steering DAC and a high voltage Miller-compensated Amplifier. It is able to provide 16 individual voltages up to 120 V for different channels of antenna arrays in commu- nication systems. Because of the process and mismatch variations, each HV DAC on the same chip has different performance. Based on the experimental test, the worst INL and DNL of the DACs are 0.98 LSB and 0.52 LSB, respectively. The total power consumption is 120 mW, and the chip size is 10.88 mm2. Besides the experimental test, a demonstrator is built to prove the feasibility to use HV ASICs to apply the required biasing voltage of the tunable components in portable devices. The measurement result is also presented in this dissertation. |
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URN: | urn:nbn:de:tuda-tuprints-54532 | ||||
Sachgruppe der Dewey Dezimalklassifikatin (DDC): | 600 Technik, Medizin, angewandte Wissenschaften > 600 Technik | ||||
Fachbereich(e)/-gebiet(e): | 18 Fachbereich Elektrotechnik und Informationstechnik 18 Fachbereich Elektrotechnik und Informationstechnik > Integrierte Schaltungen und Systeme 18 Fachbereich Elektrotechnik und Informationstechnik > Mikroelektronische Systeme |
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Hinterlegungsdatum: | 22 Mai 2016 19:55 | ||||
Letzte Änderung: | 22 Mai 2016 19:55 | ||||
PPN: | |||||
Referenten: | HOFMANN, Prof. Dr. KLAUS ; JAKOBY, Prof. Dr. ROLF | ||||
Datum der mündlichen Prüfung / Verteidigung / mdl. Prüfung: | 2015 | ||||
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