Ganesan, Ramkumar (2015)
Investigation of Variation in Organic Thin-film Transistors (OTFT) and Design of Variation-aware Organic Circuits.
Technische Universität Darmstadt
Dissertation, Erstveröffentlichung
Kurzbeschreibung (Abstract)
This work investigates the key sources of variability in OTFT namely process variations and bias-stress induced variation, and presents circuit design techniques to build robust variation-aware digital and analog circuits using OTFT. OTFT suffer from a relatively large Vt variation due to the bias stress effects, and process mismatch variations. Though these effects are also prevalent in silicon based transistors, their magnitude is comparatively larger in the case of OTFT. This renders the well-established silicon based circuits unsuitable for organic electronics. Therefore, direct adaptation of the silicon based circuits for realising organic circuits does not effectively handle the relatively large parameter and mismatch variations associated with OTFT. In this work, we first investigate the bias-stress induced threshold voltage (Vt) variation and process variations to understand the impact of these variations on the performance of organic circuits. Then, two different strategies were employed to design robust organic circuits. The first method involves designing new load topologies that are more robust to the threshold voltage variations without compromising on gain. The other strategy was to realize the essential analog circuit functionalities like comparator, ADC using digital circuit blocks. In this direction, a digital comparator and digital A/D converter circuits were developed. Finally to demonstrate the system integration, a temperature sensing organic smart label system was designed.
Typ des Eintrags: | Dissertation | ||||
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Erschienen: | 2015 | ||||
Autor(en): | Ganesan, Ramkumar | ||||
Art des Eintrags: | Erstveröffentlichung | ||||
Titel: | Investigation of Variation in Organic Thin-film Transistors (OTFT) and Design of Variation-aware Organic Circuits | ||||
Sprache: | Englisch | ||||
Referenten: | Glesner, Prof. Manfred | ||||
Publikationsjahr: | 2015 | ||||
Ort: | Darmstadt | ||||
Datum der mündlichen Prüfung: | 29 April 2015 | ||||
URL / URN: | http://tuprints.ulb.tu-darmstadt.de/4993 | ||||
Kurzbeschreibung (Abstract): | This work investigates the key sources of variability in OTFT namely process variations and bias-stress induced variation, and presents circuit design techniques to build robust variation-aware digital and analog circuits using OTFT. OTFT suffer from a relatively large Vt variation due to the bias stress effects, and process mismatch variations. Though these effects are also prevalent in silicon based transistors, their magnitude is comparatively larger in the case of OTFT. This renders the well-established silicon based circuits unsuitable for organic electronics. Therefore, direct adaptation of the silicon based circuits for realising organic circuits does not effectively handle the relatively large parameter and mismatch variations associated with OTFT. In this work, we first investigate the bias-stress induced threshold voltage (Vt) variation and process variations to understand the impact of these variations on the performance of organic circuits. Then, two different strategies were employed to design robust organic circuits. The first method involves designing new load topologies that are more robust to the threshold voltage variations without compromising on gain. The other strategy was to realize the essential analog circuit functionalities like comparator, ADC using digital circuit blocks. In this direction, a digital comparator and digital A/D converter circuits were developed. Finally to demonstrate the system integration, a temperature sensing organic smart label system was designed. |
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Alternatives oder übersetztes Abstract: |
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URN: | urn:nbn:de:tuda-tuprints-49930 | ||||
Sachgruppe der Dewey Dezimalklassifikatin (DDC): | 600 Technik, Medizin, angewandte Wissenschaften > 620 Ingenieurwissenschaften und Maschinenbau | ||||
Fachbereich(e)/-gebiet(e): | 18 Fachbereich Elektrotechnik und Informationstechnik > Integrierte Schaltungen und Systeme 18 Fachbereich Elektrotechnik und Informationstechnik > Mikroelektronische Systeme 18 Fachbereich Elektrotechnik und Informationstechnik |
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Hinterlegungsdatum: | 17 Apr 2016 19:55 | ||||
Letzte Änderung: | 17 Apr 2016 19:55 | ||||
PPN: | |||||
Referenten: | Glesner, Prof. Manfred | ||||
Datum der mündlichen Prüfung / Verteidigung / mdl. Prüfung: | 29 April 2015 | ||||
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