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Architecture level design space exploration and mapping of hardware

Pandey, Sujan and Glesner, Manfred and Mühlhäuser, Max (2005):
Architecture level design space exploration and mapping of hardware.
Piscataway, NJ, IEEE Operations Center, In: Proceedings / ISSCS 2005, International Symposium on Signals, Circuits and Systems : July 14 - 15, 2005, Iasi, Romania / organized by Faculty of Electronics and Telecommunications, "Gh. Asachi" Technical University Iasi, IEEE Romania Section CAS Chapter i, [Conference or Workshop Item]

Item Type: Conference or Workshop Item
Erschienen: 2005
Creators: Pandey, Sujan and Glesner, Manfred and Mühlhäuser, Max
Title: Architecture level design space exploration and mapping of hardware
Language: English
Series Name: Proceedings / ISSCS 2005, International Symposium on Signals, Circuits and Systems : July 14 - 15, 2005, Iasi, Romania / organized by Faculty of Electronics and Telecommunications, "Gh. Asachi" Technical University Iasi, IEEE Romania Section CAS Chapter i
Place of Publication: Piscataway, NJ
Publisher: IEEE Operations Center
Divisions: 18 Department of Electrical Engineering and Information Technology
20 Department of Computer Science > Telecooperation
20 Department of Computer Science
Date Deposited: 20 Nov 2008 08:22
License: [undefiniert]
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