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A constraint length and throughput parameterizable architecture for Viterbi decoders

Obeid, Abdulfattah M. and Garcia Ortiz, Alberto and Glesner, Manfred (2004):
A constraint length and throughput parameterizable architecture for Viterbi decoders.
In: International Conference on Microelectronics <16, 2004, Tunis>: Proceedings, ICM 2004 : December 06 - 08, 2004, Tunis, Tunisia / supported by: IEEE Electron Devices Society.- Piscataway, NJ : IEEE Technical Activities [u.a.], 2004.- XXI, 795 S.- ISBN 0-78, Piscataway, NJ, IEEE Technical Activities [u.a.], [Conference or Workshop Item]

Item Type: Conference or Workshop Item
Erschienen: 2004
Creators: Obeid, Abdulfattah M. and Garcia Ortiz, Alberto and Glesner, Manfred
Title: A constraint length and throughput parameterizable architecture for Viterbi decoders
Language: English
Series Name: International Conference on Microelectronics <16, 2004, Tunis>: Proceedings, ICM 2004 : December 06 - 08, 2004, Tunis, Tunisia / supported by: IEEE Electron Devices Society.- Piscataway, NJ : IEEE Technical Activities [u.a.], 2004.- XXI, 795 S.- ISBN 0-78
Place of Publication: Piscataway, NJ
Publisher: IEEE Technical Activities [u.a.]
Divisions: 18 Department of Electrical Engineering and Information Technology
Date Deposited: 20 Nov 2008 08:21
License: [undefiniert]
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