Bingemer, Stephan ; Zipf, Peter ; Glesner, Manfred (2003)
A granularity-based classification model for systems-on-a-chip.
11th International Symposium on Field-Programmable Gate Arrays. Monterey, Calif., USA (23.02.2003-25.02.2003)
doi: 10.1145/611817.611859
Konferenzveröffentlichung, Bibliographie
Kurzbeschreibung (Abstract)
Field-programmable logic has become an increasingly important technology for the design of digital circuits. One interesting point in the field of reconfigurable logic is its classification within the implementation space of other technologies. Such a classification gains importance if FPGA technology becomes an integral part of Systems-on-a-Chip (SoC). The poster discusses an approach to classify technologies based on their granularity. Therefore, a new distinction into homogeneous and heterogeneous granularity is proposed. This leads to a theoretic classification method for the combination of two or more technologies. Using this method the result of a combination of two or more technologies can be determined qualitatively. The poster further shows opportunities to improve standard CAD-software based on the model proposed.
| Typ des Eintrags: | Konferenzveröffentlichung |
|---|---|
| Erschienen: | 2003 |
| Autor(en): | Bingemer, Stephan ; Zipf, Peter ; Glesner, Manfred |
| Art des Eintrags: | Bibliographie |
| Titel: | A granularity-based classification model for systems-on-a-chip |
| Sprache: | Englisch |
| Publikationsjahr: | 2003 |
| Ort: | New York, NY |
| Verlag: | ACM Press |
| Buchtitel: | International Symposium on Field-Programmable Gate Arrays <11, 2003, Monterey, Calif.:> FPGA : ACM/SIGDA Eleventh ACM International Symposium on Field-Programmable Gate Arrays ; Monterey, California, USA, February 23 - 25, 2003 |
| Veranstaltungstitel: | 11th International Symposium on Field-Programmable Gate Arrays |
| Veranstaltungsort: | Monterey, Calif., USA |
| Veranstaltungsdatum: | 23.02.2003-25.02.2003 |
| DOI: | 10.1145/611817.611859 |
| Kurzbeschreibung (Abstract): | Field-programmable logic has become an increasingly important technology for the design of digital circuits. One interesting point in the field of reconfigurable logic is its classification within the implementation space of other technologies. Such a classification gains importance if FPGA technology becomes an integral part of Systems-on-a-Chip (SoC). The poster discusses an approach to classify technologies based on their granularity. Therefore, a new distinction into homogeneous and heterogeneous granularity is proposed. This leads to a theoretic classification method for the combination of two or more technologies. Using this method the result of a combination of two or more technologies can be determined qualitatively. The poster further shows opportunities to improve standard CAD-software based on the model proposed. |
| Fachbereich(e)/-gebiet(e): | 18 Fachbereich Elektrotechnik und Informationstechnik |
| Hinterlegungsdatum: | 20 Nov 2008 08:18 |
| Letzte Änderung: | 20 Dez 2024 10:47 |
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