Schwarz, Tobias (2024)
Efficient Technology Mapping Methods for Robust Genetic Logic Circuits.
Technische Universität Darmstadt
doi: 10.26083/tuprints-00027024
Dissertation, Erstveröffentlichung, Verlagsversion
Kurzbeschreibung (Abstract)
In the field of synthetic biology, one of the aims of researchers is to control the flow of information in cells using genetic logic circuits. Similarly to digital electronic circuits, signals are divided into Boolean 0 and 1 values through the application of thresholds. Genetic building blocks are combined together to form logic gates that implement Boolean functions, which are in turn combined into genetic gate libraries. This modularization allows the application of design automation methods to construct genetic circuits and represents the basis for the field of genetic design automation. In analogy to electronic design automation, the process of mapping a functional specification to the target technology is called technology mapping.
Compared to electronics, genetic technology possesses characteristics that pose new challenges to technology mapping methods. Due to the use of substances as signal transmitters and the shared medium of the cell, each gate in the circuit is required to use individual genetic parts. This leads to heterogeneous transfer characteristics among the gates and requires optimizing the gate assignment to the circuit topology. Further, cells exhibit strong variability and undesired interactions among synthetic and natural parts, which have to be considered for constructing robust genetic circuits. Existing approaches in this developing field often adopt methods from electronic design automation and have the potential for further adaptation to the genetic domain.
In this work, technology mapping methods for the design of combinational genetic logic circuits are presented. While existing methods rely on circuit topologies defined by the user or synthesized using objective functions known from electronics, in this work the circuit topology is incorporated as an additional degree of freedom. The method is evaluated using a set of Boolean functions, which have previously been implemented in vivo. By enumerating structural variants, a maximum 11.3-fold and a mean 38% improvement in circuit performance can be achieved, as measured by a traditional circuit score, while keeping the number of used gates minimal. Efficient methods for optimizing the assignment of gates to the circuit are presented, which allow for the exploration of broad design spaces and compensate for the computational burden of elaborate models. Based on the functional hierarchy of genetic circuits and fundamental features of genetic gates, a simulated annealing heuristic and a branch-and-bound scheme featuring both a heuristic and an exact mode are devised. For finding exact solutions, the methods provide a 20-fold speedup compared to an exhaustive search. The heuristics achieve a 722-fold speedup while delivering near-optimal solutions with a worst-case deviation of -0.11%, outperforming an existing heuristic.
Additionally, robustness to the variability of cells is integrated into the technology mapping process as a design objective. To this end, the simulated annealing method is adapted to use a robustness-centric objective function, the E-Score and a heuristic approach to robustness is devised and integrated into the branch-and-bound scheme. Both approaches exhibit a good mapping efficiency, and their comparison highlights the increased robustness of designs optimized globally for the E-Score. Finally, the integration of a context-aware circuit model enables the finding of optimal designs, even if the circuit is subject to undesired interactions, i.e., crosstalk. By evaluating different crosstalk scenarios, it could be shown that specific non-orthogonalities can be tolerated in genetic gate libraries, provided that they are considered in the design process.
Typ des Eintrags: | Dissertation | ||||
---|---|---|---|---|---|
Erschienen: | 2024 | ||||
Autor(en): | Schwarz, Tobias | ||||
Art des Eintrags: | Erstveröffentlichung | ||||
Titel: | Efficient Technology Mapping Methods for Robust Genetic Logic Circuits | ||||
Sprache: | Englisch | ||||
Referenten: | Hochberger, Prof. Dr. Christian ; Riedel, Prof. Marc | ||||
Publikationsjahr: | 10 Mai 2024 | ||||
Ort: | Darmstadt | ||||
Kollation: | xii, 166 Seiten | ||||
Datum der mündlichen Prüfung: | 12 April 2024 | ||||
DOI: | 10.26083/tuprints-00027024 | ||||
URL / URN: | https://tuprints.ulb.tu-darmstadt.de/27024 | ||||
Kurzbeschreibung (Abstract): | In the field of synthetic biology, one of the aims of researchers is to control the flow of information in cells using genetic logic circuits. Similarly to digital electronic circuits, signals are divided into Boolean 0 and 1 values through the application of thresholds. Genetic building blocks are combined together to form logic gates that implement Boolean functions, which are in turn combined into genetic gate libraries. This modularization allows the application of design automation methods to construct genetic circuits and represents the basis for the field of genetic design automation. In analogy to electronic design automation, the process of mapping a functional specification to the target technology is called technology mapping. Compared to electronics, genetic technology possesses characteristics that pose new challenges to technology mapping methods. Due to the use of substances as signal transmitters and the shared medium of the cell, each gate in the circuit is required to use individual genetic parts. This leads to heterogeneous transfer characteristics among the gates and requires optimizing the gate assignment to the circuit topology. Further, cells exhibit strong variability and undesired interactions among synthetic and natural parts, which have to be considered for constructing robust genetic circuits. Existing approaches in this developing field often adopt methods from electronic design automation and have the potential for further adaptation to the genetic domain. In this work, technology mapping methods for the design of combinational genetic logic circuits are presented. While existing methods rely on circuit topologies defined by the user or synthesized using objective functions known from electronics, in this work the circuit topology is incorporated as an additional degree of freedom. The method is evaluated using a set of Boolean functions, which have previously been implemented in vivo. By enumerating structural variants, a maximum 11.3-fold and a mean 38% improvement in circuit performance can be achieved, as measured by a traditional circuit score, while keeping the number of used gates minimal. Efficient methods for optimizing the assignment of gates to the circuit are presented, which allow for the exploration of broad design spaces and compensate for the computational burden of elaborate models. Based on the functional hierarchy of genetic circuits and fundamental features of genetic gates, a simulated annealing heuristic and a branch-and-bound scheme featuring both a heuristic and an exact mode are devised. For finding exact solutions, the methods provide a 20-fold speedup compared to an exhaustive search. The heuristics achieve a 722-fold speedup while delivering near-optimal solutions with a worst-case deviation of -0.11%, outperforming an existing heuristic. Additionally, robustness to the variability of cells is integrated into the technology mapping process as a design objective. To this end, the simulated annealing method is adapted to use a robustness-centric objective function, the E-Score and a heuristic approach to robustness is devised and integrated into the branch-and-bound scheme. Both approaches exhibit a good mapping efficiency, and their comparison highlights the increased robustness of designs optimized globally for the E-Score. Finally, the integration of a context-aware circuit model enables the finding of optimal designs, even if the circuit is subject to undesired interactions, i.e., crosstalk. By evaluating different crosstalk scenarios, it could be shown that specific non-orthogonalities can be tolerated in genetic gate libraries, provided that they are considered in the design process. |
||||
Alternatives oder übersetztes Abstract: |
|
||||
Freie Schlagworte: | Genetic Design Automation, Technology Mapping, Genetic Circuits, Branch-and-Bound, Simulated Annealing | ||||
Status: | Verlagsversion | ||||
URN: | urn:nbn:de:tuda-tuprints-270241 | ||||
Sachgruppe der Dewey Dezimalklassifikatin (DDC): | 000 Allgemeines, Informatik, Informationswissenschaft > 004 Informatik 500 Naturwissenschaften und Mathematik > 570 Biowissenschaften, Biologie 600 Technik, Medizin, angewandte Wissenschaften > 621.3 Elektrotechnik, Elektronik |
||||
Fachbereich(e)/-gebiet(e): | 18 Fachbereich Elektrotechnik und Informationstechnik 18 Fachbereich Elektrotechnik und Informationstechnik > Institut für Datentechnik 18 Fachbereich Elektrotechnik und Informationstechnik > Institut für Datentechnik > Rechnersysteme |
||||
Hinterlegungsdatum: | 10 Mai 2024 09:12 | ||||
Letzte Änderung: | 13 Mai 2024 06:03 | ||||
PPN: | |||||
Referenten: | Hochberger, Prof. Dr. Christian ; Riedel, Prof. Marc | ||||
Datum der mündlichen Prüfung / Verteidigung / mdl. Prüfung: | 12 April 2024 | ||||
Export: | |||||
Suche nach Titel in: | TUfind oder in Google |
Frage zum Eintrag |
Optionen (nur für Redakteure)
Redaktionelle Details anzeigen |