Aboelmaged, Maha ; Shisha, Ali ; Abd El Ghany, Mohamed A. (2021)
High-Performance Data Compression-Based Design for Dynamic IoT Security Systems.
In: Electronics, 10 (16)
doi: 10.3390/electronics10161989
Artikel, Bibliographie

Kurzbeschreibung (Abstract)

IoT technology is evolving at a quick pace and is becoming an important part of everyday life. Consequently, IoT systems hold large amounts of data related to the user of the system that is vulnerable to security breaches. Thus, data collected by IoT systems need to be secured efficiently without affecting the IoT systems’ performance and without compromising security as well. In this paper, a high-performance dynamic security system is introduced. The system makes use of the ZedBoard’s dynamic partial reconfiguration capability to shift between three distinct cipher algorithms: AEGIS, ASCON, and DEOXYS-II. The switching between the three algorithms is performed using two different techniques: the algorithm hopping technique or the power adaptive technique. The choice of which technique to be used is dependent on whether the system needs to be focused on performance or power saving. The ciphers used are the CAESAR competition finalists that achieved the greatest results in each of the three competition categories, where each cipher algorithm has its own set of significant characteristics. The proposed design seeks to reduce the FPGA reconfiguration time by the application of LZ4 (Lempel-Ziv4) compression and decompression techniques on the ciphers’ bitstream files. The reconfiguration time decreased by a minimum of 38% in comparison to the state-of-the-art design, while the resource utilization increased by approximately 2%.

Typ des Eintrags:	Artikel
Erschienen:	2021
Autor(en):	Aboelmaged, Maha ; Shisha, Ali ; Abd El Ghany, Mohamed A.
Art des Eintrags:	Bibliographie
Titel:	High-Performance Data Compression-Based Design for Dynamic IoT Security Systems
Sprache:	Englisch
Publikationsjahr:	18 August 2021
Ort:	Basel
Verlag:	MDPI
Titel der Zeitschrift, Zeitung oder Schriftenreihe:	Electronics
Jahrgang/Volume einer Zeitschrift:	10
(Heft-)Nummer:	16
Kollation:	20 Seiten
DOI:	10.3390/electronics10161989
Zugehörige Links:	TUprints Zweitveröffentlichung
Kurzbeschreibung (Abstract):	IoT technology is evolving at a quick pace and is becoming an important part of everyday life. Consequently, IoT systems hold large amounts of data related to the user of the system that is vulnerable to security breaches. Thus, data collected by IoT systems need to be secured efficiently without affecting the IoT systems’ performance and without compromising security as well. In this paper, a high-performance dynamic security system is introduced. The system makes use of the ZedBoard’s dynamic partial reconfiguration capability to shift between three distinct cipher algorithms: AEGIS, ASCON, and DEOXYS-II. The switching between the three algorithms is performed using two different techniques: the algorithm hopping technique or the power adaptive technique. The choice of which technique to be used is dependent on whether the system needs to be focused on performance or power saving. The ciphers used are the CAESAR competition finalists that achieved the greatest results in each of the three competition categories, where each cipher algorithm has its own set of significant characteristics. The proposed design seeks to reduce the FPGA reconfiguration time by the application of LZ4 (Lempel-Ziv4) compression and decompression techniques on the ciphers’ bitstream files. The reconfiguration time decreased by a minimum of 38% in comparison to the state-of-the-art design, while the resource utilization increased by approximately 2%.
Freie Schlagworte:	IoT, ZedBoard, DPR, LZ4, lightweight cryptography
Zusätzliche Informationen:	Erstveröffentlichung; Art.No: 1989; This article belongs to the Section Computer Science & Engineering
Sachgruppe der Dewey Dezimalklassifikatin (DDC):	600 Technik, Medizin, angewandte Wissenschaften > 621.3 Elektrotechnik, Elektronik
Fachbereich(e)/-gebiet(e):	18 Fachbereich Elektrotechnik und Informationstechnik 18 Fachbereich Elektrotechnik und Informationstechnik > Institut für Datentechnik 18 Fachbereich Elektrotechnik und Informationstechnik > Institut für Datentechnik > Integrierte Elektronische Systeme (IES)
Hinterlegungsdatum:	28 Feb 2024 07:34
Letzte Änderung:	28 Feb 2024 07:34
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