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Static Neural Compiler Optimization via Deep Reinforcement Learning

Mammadli, Rahim ; Jannesari, Ali ; Wolf, Felix (2020)
Static Neural Compiler Optimization via Deep Reinforcement Learning.
International Conference for High Performance Computing, Networking, Storage and Analysis (SC'20). virtual Conference (09.-19.11.2020)
doi: 10.1109/LLVMHPCHiPar51896.2020.00006
Konferenzveröffentlichung, Bibliographie

Kurzbeschreibung (Abstract)

The phase-ordering problem of modern compilers has received a lot of attention from the research community over the years, yet remains largely unsolved. Various optimization sequences exposed to the user are manually designed by compiler developers. In designing such a sequence developers have to choose the set of optimization passes, their parameters and ordering within a sequence. Resulting sequences usually fall short of achieving optimal runtime for a given source code and may sometimes even degrade the performance when compared to unoptimized version. In this paper, we employ a deep reinforcement learning approach to the phase-ordering problem. Provided with sub-sequences constituting LLVM's O3 sequence, our agent learns to outperform the O3 sequence on the set of source codes used for training and achieves competitive performance on the validation set, gaining up to 1.32x speedup on previously-unseen programs. Notably, our approach differs from autotuning methods by not depending on one or more test runs of the program for making successful optimization decisions. It has no dependence on any dynamic feature, but only on the statically-attainable intermediate representation of the source code. We believe that the models trained using our approach can be integrated into modern compilers as neural optimization agents, at first to complement, and eventually replace the handcrafted optimization sequences.

Typ des Eintrags: Konferenzveröffentlichung
Erschienen: 2020
Autor(en): Mammadli, Rahim ; Jannesari, Ali ; Wolf, Felix
Art des Eintrags: Bibliographie
Titel: Static Neural Compiler Optimization via Deep Reinforcement Learning
Sprache: Englisch
Publikationsjahr: 12 November 2020
Verlag: IEEE
Buchtitel: Proceedings of LLVM-HPC2020 and HiPar 2020: Sixth Workshop on the LLVM Compiler Infrastructure in HPC and Workshop on Hierarchical Parallelism for Exascale Computing
Veranstaltungstitel: International Conference for High Performance Computing, Networking, Storage and Analysis (SC'20)
Veranstaltungsort: virtual Conference
Veranstaltungsdatum: 09.-19.11.2020
DOI: 10.1109/LLVMHPCHiPar51896.2020.00006
Kurzbeschreibung (Abstract):

The phase-ordering problem of modern compilers has received a lot of attention from the research community over the years, yet remains largely unsolved. Various optimization sequences exposed to the user are manually designed by compiler developers. In designing such a sequence developers have to choose the set of optimization passes, their parameters and ordering within a sequence. Resulting sequences usually fall short of achieving optimal runtime for a given source code and may sometimes even degrade the performance when compared to unoptimized version. In this paper, we employ a deep reinforcement learning approach to the phase-ordering problem. Provided with sub-sequences constituting LLVM's O3 sequence, our agent learns to outperform the O3 sequence on the set of source codes used for training and achieves competitive performance on the validation set, gaining up to 1.32x speedup on previously-unseen programs. Notably, our approach differs from autotuning methods by not depending on one or more test runs of the program for making successful optimization decisions. It has no dependence on any dynamic feature, but only on the statically-attainable intermediate representation of the source code. We believe that the models trained using our approach can be integrated into modern compilers as neural optimization agents, at first to complement, and eventually replace the handcrafted optimization sequences.

Freie Schlagworte: LOEWE|SF4.0, Graduate School CE, LOEWE
Zusätzliche Informationen:

6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar), 12.11.2020

Fachbereich(e)/-gebiet(e): 20 Fachbereich Informatik
20 Fachbereich Informatik > Parallele Programmierung
Exzellenzinitiative
Exzellenzinitiative > Graduiertenschulen
Exzellenzinitiative > Graduiertenschulen > Graduate School of Computational Engineering (CE)
Zentrale Einrichtungen
Zentrale Einrichtungen > Hochschulrechenzentrum (HRZ)
Zentrale Einrichtungen > Hochschulrechenzentrum (HRZ) > Hochleistungsrechner
Hinterlegungsdatum: 04 Apr 2024 09:55
Letzte Änderung: 04 Apr 2024 09:55
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