Aboelmaged, Maha ; Shisha, Ali ; Ghany, Mohamed A. Abd El (2024)
High-Performance Data Compression-Based Design for Dynamic IoT Security Systems.
In: Electronics, 2021, 10 (16)
doi: 10.26083/tuprints-00019626
Artikel, Zweitveröffentlichung, Verlagsversion
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Kurzbeschreibung (Abstract)
IoT technology is evolving at a quick pace and is becoming an important part of everyday life. Consequently, IoT systems hold large amounts of data related to the user of the system that is vulnerable to security breaches. Thus, data collected by IoT systems need to be secured efficiently without affecting the IoT systems’ performance and without compromising security as well. In this paper, a high-performance dynamic security system is introduced. The system makes use of the ZedBoard’s dynamic partial reconfiguration capability to shift between three distinct cipher algorithms: AEGIS, ASCON, and DEOXYS-II. The switching between the three algorithms is performed using two different techniques: the algorithm hopping technique or the power adaptive technique. The choice of which technique to be used is dependent on whether the system needs to be focused on performance or power saving. The ciphers used are the CAESAR competition finalists that achieved the greatest results in each of the three competition categories, where each cipher algorithm has its own set of significant characteristics. The proposed design seeks to reduce the FPGA reconfiguration time by the application of LZ4 (Lempel-Ziv4) compression and decompression techniques on the ciphers’ bitstream files. The reconfiguration time decreased by a minimum of 38% in comparison to the state-of-the-art design, while the resource utilization increased by approximately 2%.
| Typ des Eintrags: | Artikel |
|---|---|
| Erschienen: | 2024 |
| Autor(en): | Aboelmaged, Maha ; Shisha, Ali ; Ghany, Mohamed A. Abd El |
| Art des Eintrags: | Zweitveröffentlichung |
| Titel: | High-Performance Data Compression-Based Design for Dynamic IoT Security Systems |
| Sprache: | Englisch |
| Publikationsjahr: | 12 Januar 2024 |
| Ort: | Darmstadt |
| Publikationsdatum der Erstveröffentlichung: | 2021 |
| Ort der Erstveröffentlichung: | Basel |
| Verlag: | MDPI |
| Titel der Zeitschrift, Zeitung oder Schriftenreihe: | Electronics |
| Jahrgang/Volume einer Zeitschrift: | 10 |
| (Heft-)Nummer: | 16 |
| Kollation: | 20 Seiten |
| DOI: | 10.26083/tuprints-00019626 |
| URL / URN: | https://tuprints.ulb.tu-darmstadt.de/19626 |
| Zugehörige Links: | |
| Herkunft: | Zweitveröffentlichung DeepGreen |
| Kurzbeschreibung (Abstract): | IoT technology is evolving at a quick pace and is becoming an important part of everyday life. Consequently, IoT systems hold large amounts of data related to the user of the system that is vulnerable to security breaches. Thus, data collected by IoT systems need to be secured efficiently without affecting the IoT systems’ performance and without compromising security as well. In this paper, a high-performance dynamic security system is introduced. The system makes use of the ZedBoard’s dynamic partial reconfiguration capability to shift between three distinct cipher algorithms: AEGIS, ASCON, and DEOXYS-II. The switching between the three algorithms is performed using two different techniques: the algorithm hopping technique or the power adaptive technique. The choice of which technique to be used is dependent on whether the system needs to be focused on performance or power saving. The ciphers used are the CAESAR competition finalists that achieved the greatest results in each of the three competition categories, where each cipher algorithm has its own set of significant characteristics. The proposed design seeks to reduce the FPGA reconfiguration time by the application of LZ4 (Lempel-Ziv4) compression and decompression techniques on the ciphers’ bitstream files. The reconfiguration time decreased by a minimum of 38% in comparison to the state-of-the-art design, while the resource utilization increased by approximately 2%. |
| Freie Schlagworte: | IoT, ZedBoard, DPR, LZ4, lightweight cryptography |
| Status: | Verlagsversion |
| URN: | urn:nbn:de:tuda-tuprints-196268 |
| Zusätzliche Informationen: | This article belongs to the Section Computer Science & Engineering |
| Sachgruppe der Dewey Dezimalklassifikatin (DDC): | 600 Technik, Medizin, angewandte Wissenschaften > 621.3 Elektrotechnik, Elektronik |
| Fachbereich(e)/-gebiet(e): | 18 Fachbereich Elektrotechnik und Informationstechnik 18 Fachbereich Elektrotechnik und Informationstechnik > Institut für Datentechnik 18 Fachbereich Elektrotechnik und Informationstechnik > Institut für Datentechnik > Integrierte Elektronische Systeme (IES) |
| Hinterlegungsdatum: | 12 Jan 2024 14:09 |
| Letzte Änderung: | 26 Feb 2024 16:14 |
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| Suche nach Titel in: | TUfind oder in Google |
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