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Accelerating Pattern Matching Queries in Hybrid CPU-FPGA Architectures

Sidler, David ; István, Zsolt ; Owaida, Muhsen ; Alonso, Gustavo (2017)
Accelerating Pattern Matching Queries in Hybrid CPU-FPGA Architectures.
2017 ACM International Conference on Management of Data. Chicago, USA (14.05.2017-19.05.2017)
doi: 10.1145/3035918.3035954
Konferenzveröffentlichung, Bibliographie

Kurzbeschreibung (Abstract)

Relational databases execute user queries through operator trees, where each operator has a well defined interface and a specific task (e.g., arithmetic function, pattern matching, aggregation, etc.). Hardware acceleration of compute intensive operators is a promising prospect but it comes with challenges. Databases execute tens of thousands of different queries per second. Thus, if only one specific instantiation of an operator is supported by the accelerator, it will have little effect on the overall workload. In this paper we explore the tradeoff between resource efficiency and expression complexity for an FPGA accelerator targeting string-matching operators (LIKE and REGEXPLIKE in SQL). This tradeoff is complex. For instance, the FPGA not always wins: simple queries that can be answered from indexes run faster on the CPU. On complex regular expressions, the FPGA is faster but needs to be parametrized at runtime to be able to support different queries. For very long patterns, the entire expression might not fit into the FPGA circuit and a combined mode CPU-FPGA must be chosen. We evaluate our design on a heterogeneous multi-core machine in which the FPGA has cache coherent access to the CPU memory. In addition to the string matching circuit, we also show how to implement database page parsing logic so as to be able to work directly on the same memory data structures as the database engine.

Typ des Eintrags: Konferenzveröffentlichung
Erschienen: 2017
Autor(en): Sidler, David ; István, Zsolt ; Owaida, Muhsen ; Alonso, Gustavo
Art des Eintrags: Bibliographie
Titel: Accelerating Pattern Matching Queries in Hybrid CPU-FPGA Architectures
Sprache: Englisch
Publikationsjahr: 9 Mai 2017
Verlag: ACM
Buchtitel: SIGMOD'17: Proceedings of the 2017 ACM International Conference on Management of Data
Veranstaltungstitel: 2017 ACM International Conference on Management of Data
Veranstaltungsort: Chicago, USA
Veranstaltungsdatum: 14.05.2017-19.05.2017
DOI: 10.1145/3035918.3035954
Kurzbeschreibung (Abstract):

Relational databases execute user queries through operator trees, where each operator has a well defined interface and a specific task (e.g., arithmetic function, pattern matching, aggregation, etc.). Hardware acceleration of compute intensive operators is a promising prospect but it comes with challenges. Databases execute tens of thousands of different queries per second. Thus, if only one specific instantiation of an operator is supported by the accelerator, it will have little effect on the overall workload. In this paper we explore the tradeoff between resource efficiency and expression complexity for an FPGA accelerator targeting string-matching operators (LIKE and REGEXPLIKE in SQL). This tradeoff is complex. For instance, the FPGA not always wins: simple queries that can be answered from indexes run faster on the CPU. On complex regular expressions, the FPGA is faster but needs to be parametrized at runtime to be able to support different queries. For very long patterns, the entire expression might not fit into the FPGA circuit and a combined mode CPU-FPGA must be chosen. We evaluate our design on a heterogeneous multi-core machine in which the FPGA has cache coherent access to the CPU memory. In addition to the string matching circuit, we also show how to implement database page parsing logic so as to be able to work directly on the same memory data structures as the database engine.

Fachbereich(e)/-gebiet(e): 20 Fachbereich Informatik
20 Fachbereich Informatik > Distributed and Networked Systems
Hinterlegungsdatum: 23 Jan 2023 12:04
Letzte Änderung: 26 Apr 2023 11:35
PPN: 507291743
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