Jeyakumaran, Thireshan ; Atoofian, Ehsan ; Xiao, Yang ; Li, Zhen ; Jannesari, Ali (2016)
Improving Performance of Transactional Applications through Adaptive Transactional Memory.
24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing. Heraklion, Greece (17.02.2016-19.02.2016)
doi: 10.1109/PDP.2016.85
Konferenzveröffentlichung, Bibliographie
Kurzbeschreibung (Abstract)
Transactional memory (TM) has become progressively widespread especially with hardware transactional memory implementation becoming increasingly available. In this paper, we focus on Restricted Transactional Memory (RTM) in Intel's Haswell processor and show that performance of RTM varies across applications. While RTM enhances performance of some applications relative to software transactional memory (STM), in some others, it degrades performance. We exploit this variability and present an adaptive system which is a static approach that switches between HTM and STM in transaction granularity. By incorporating a decision tree prediction module, we are able to predict the optimum TM system for a given transaction based on its characteristics. Our adaptive system supports both HTM and STM with the aim of increasing an application's performance. We show that our adaptive system has an average overall speedup of 20.82% over both TM systems.
| Typ des Eintrags: | Konferenzveröffentlichung |
|---|---|
| Erschienen: | 2016 |
| Autor(en): | Jeyakumaran, Thireshan ; Atoofian, Ehsan ; Xiao, Yang ; Li, Zhen ; Jannesari, Ali |
| Art des Eintrags: | Bibliographie |
| Titel: | Improving Performance of Transactional Applications through Adaptive Transactional Memory |
| Sprache: | Englisch |
| Publikationsjahr: | 4 April 2016 |
| Verlag: | IEEE |
| Buchtitel: | Proceedings: 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP 2016) |
| Veranstaltungstitel: | 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing |
| Veranstaltungsort: | Heraklion, Greece |
| Veranstaltungsdatum: | 17.02.2016-19.02.2016 |
| DOI: | 10.1109/PDP.2016.85 |
| Kurzbeschreibung (Abstract): | Transactional memory (TM) has become progressively widespread especially with hardware transactional memory implementation becoming increasingly available. In this paper, we focus on Restricted Transactional Memory (RTM) in Intel's Haswell processor and show that performance of RTM varies across applications. While RTM enhances performance of some applications relative to software transactional memory (STM), in some others, it degrades performance. We exploit this variability and present an adaptive system which is a static approach that switches between HTM and STM in transaction granularity. By incorporating a decision tree prediction module, we are able to predict the optimum TM system for a given transaction based on its characteristics. Our adaptive system supports both HTM and STM with the aim of increasing an application's performance. We show that our adaptive system has an average overall speedup of 20.82% over both TM systems. |
| Fachbereich(e)/-gebiet(e): | 20 Fachbereich Informatik 20 Fachbereich Informatik > Parallele Programmierung |
| Hinterlegungsdatum: | 03 Mai 2016 20:12 |
| Letzte Änderung: | 17 Mai 2024 07:36 |
| PPN: | 518391728 |
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