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Optimal processor interface for CGRA-based accelerators implemented on FPGAs

Jung, Lukas Johannes ; Hochberger, Christian (2016)
Optimal processor interface for CGRA-based accelerators implemented on FPGAs.
doi: 10.1109/ReConFig.2016.7857178
Conference or Workshop Item, Bibliographie

Item Type: Conference or Workshop Item
Erschienen: 2016
Creators: Jung, Lukas Johannes ; Hochberger, Christian
Type of entry: Bibliographie
Title: Optimal processor interface for CGRA-based accelerators implemented on FPGAs
Language: German
Date: 30 November 2016
DOI: 10.1109/ReConFig.2016.7857178
URL / URN: http://ieeexplore.ieee.org/document/7857178/
Divisions: 18 Department of Electrical Engineering and Information Technology > Institute of Computer Engineering
18 Department of Electrical Engineering and Information Technology > Institute of Computer Engineering > Computer Systems Group
18 Department of Electrical Engineering and Information Technology
Date Deposited: 21 Feb 2017 08:09
Last Modified: 21 Feb 2017 08:09
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