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RiCaSi: Rigorous Cache Side Channel Mitigation via Selective Circuit Compilation

Mantel, Heiko and Scheidel, Lukas and Schneider, Thomas and Weber, Alexandra and Weinert, Christian and Weißmantel, Tim (2020):
RiCaSi: Rigorous Cache Side Channel Mitigation via Selective Circuit Compilation.
19. International Conference on Cryptology And Network Security (CANS'20), virtual Conference, 14.-16.12., [Conference or Workshop Item]

Official URL: https://cans2020.at/
Item Type: Conference or Workshop Item
Erschienen: 2020
Creators: Mantel, Heiko and Scheidel, Lukas and Schneider, Thomas and Weber, Alexandra and Weinert, Christian and Weißmantel, Tim
Title: RiCaSi: Rigorous Cache Side Channel Mitigation via Selective Circuit Compilation
Language: English
Uncontrolled Keywords: Engineering; E3; E4
Divisions: 20 Department of Computer Science
20 Department of Computer Science > Cryptography and Privacy Engineering (ENCRYPTO)
20 Department of Computer Science > Modeling and Analysis of Information Systems (MAIS)
DFG-Collaborative Research Centres (incl. Transregio)
DFG-Collaborative Research Centres (incl. Transregio) > Collaborative Research Centres
DFG-Graduiertenkollegs
DFG-Graduiertenkollegs > Research Training Group 2050 Privacy and Trust for Mobile Users
Profile Areas
Profile Areas > Cybersecurity (CYSEC)
LOEWE
LOEWE > LOEWE-Zentren
LOEWE > LOEWE-Zentren > CRISP - Center for Research in Security and Privacy
DFG-Collaborative Research Centres (incl. Transregio) > Collaborative Research Centres > CRC 1119: CROSSING – Cryptography-Based Security Solutions: Enabling Trust in New and Next Generation Computing Environments
Event Title: 19. International Conference on Cryptology And Network Security (CANS'20)
Event Location: virtual Conference
Event Dates: 14.-16.12.
Date Deposited: 21 Oct 2020 08:51
Official URL: https://cans2020.at/
Corresponding Links:
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