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Optimization of arithmetic circuits built with linear threshold gates

Voss, Burkart and Glesner, M. (1998):
Optimization of arithmetic circuits built with linear threshold gates.
In: Workshop on Innovative Circuits and Systems for Nano Electronics <3, 1998, München>: Proceedings. S. C1/1 - C1/5, [Conference or Workshop Item]

Item Type: Conference or Workshop Item
Erschienen: 1998
Creators: Voss, Burkart and Glesner, M.
Title: Optimization of arithmetic circuits built with linear threshold gates
Language: English
Series Name: Workshop on Innovative Circuits and Systems for Nano Electronics <3, 1998, München>: Proceedings. S. C1/1 - C1/5
Divisions: 20 Department of Computer Science
Date Deposited: 19 Nov 2008 16:04
License: [undefiniert]
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