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Automatic Generation of Scheduled SystemC Models of Embedded Systems From Extended Task Graphs

Klaus, Stephan ; Huss, Sorin ; Trautmann, T. (2002)
Automatic Generation of Scheduled SystemC Models of Embedded Systems From Extended Task Graphs.
Konferenzveröffentlichung, Bibliographie

Kurzbeschreibung (Abstract)

Because of the growing importance and increasing complexity of embedded systems, it is highly desired to shift the design process to a higher level of abstraction and to support an early system validation. Based on an abstract specification denoted as extended Task Graph (eTG) and allocation, binding, and scheduling information, a scheduled and executable SystemC model is generated, which represents a transaction level model (TLM) of the distributed embedded system. The well defined specification model and its execution semantic allow the clear separation of commu-nication and core functionality. Therewith, the whole communication and runtime control can be automatically generated, and the SystemC simulation kernel enables an early execution and timing validation of the specification. The implementation of the associated control units is based on finite state machines, which are responsible for the runtime control including communication and execution order...

Typ des Eintrags: Konferenzveröffentlichung
Erschienen: 2002
Autor(en): Klaus, Stephan ; Huss, Sorin ; Trautmann, T.
Art des Eintrags: Bibliographie
Titel: Automatic Generation of Scheduled SystemC Models of Embedded Systems From Extended Task Graphs
Sprache: Englisch
Publikationsjahr: September 2002
Buchtitel: Proc. Int. Forum on Design Languages
Kurzbeschreibung (Abstract):

Because of the growing importance and increasing complexity of embedded systems, it is highly desired to shift the design process to a higher level of abstraction and to support an early system validation. Based on an abstract specification denoted as extended Task Graph (eTG) and allocation, binding, and scheduling information, a scheduled and executable SystemC model is generated, which represents a transaction level model (TLM) of the distributed embedded system. The well defined specification model and its execution semantic allow the clear separation of commu-nication and core functionality. Therewith, the whole communication and runtime control can be automatically generated, and the SystemC simulation kernel enables an early execution and timing validation of the specification. The implementation of the associated control units is based on finite state machines, which are responsible for the runtime control including communication and execution order...

Fachbereich(e)/-gebiet(e): 20 Fachbereich Informatik
20 Fachbereich Informatik > Integrierte Schaltungen und Systeme
Hinterlegungsdatum: 31 Dez 2016 00:15
Letzte Änderung: 03 Jun 2018 21:31
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