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A Novel Technique for FPGA IP Protection

Malipatlolla, Sunil and Huss, Sorin (2010):
A Novel Technique for FPGA IP Protection.
In: Systems and Network Security Doctoral Workshop, 55th International Scientific Colloquium (IWK 2010), TU Ilmenau, [Conference or Workshop Item]

Abstract

The configuration data sequence of a field programmable gate array (FPGA) is an intellectual property (IP) of the original designer. With the increase in deployment of FPGAs in modern embedded systems, the IP protection of FPGA hardware designs has become a necessary requirement for many IP vendors. There have been already many proposals to overcome this problem using symmetric encryption techniques but these methods need a cryptographic key to be stored in a non-volatile memory located on FPGA or in a battery-backed RAM (Random Access Memory) as done in some of the current FPGAs. The expenses with the proposed methods are, occupation of larger area on FPGA in the former case and limited lifetime of the device in the latter. In contrast, we propose a novel method which combines the dynamic partial reconfiguration (dynamic PR) feature of an SRAM-based FPGA with the public key cryptography (PKC) to protect the FPGA configuration files without the need to store any keys on FPGA.

Item Type: Conference or Workshop Item
Erschienen: 2010
Creators: Malipatlolla, Sunil and Huss, Sorin
Title: A Novel Technique for FPGA IP Protection
Language: ["languages_typename_1" not defined]
Abstract:

The configuration data sequence of a field programmable gate array (FPGA) is an intellectual property (IP) of the original designer. With the increase in deployment of FPGAs in modern embedded systems, the IP protection of FPGA hardware designs has become a necessary requirement for many IP vendors. There have been already many proposals to overcome this problem using symmetric encryption techniques but these methods need a cryptographic key to be stored in a non-volatile memory located on FPGA or in a battery-backed RAM (Random Access Memory) as done in some of the current FPGAs. The expenses with the proposed methods are, occupation of larger area on FPGA in the former case and limited lifetime of the device in the latter. In contrast, we propose a novel method which combines the dynamic partial reconfiguration (dynamic PR) feature of an SRAM-based FPGA with the public key cryptography (PKC) to protect the FPGA configuration files without the need to store any keys on FPGA.

Title of Book: Systems and Network Security Doctoral Workshop, 55th International Scientific Colloquium (IWK 2010), TU Ilmenau
Uncontrolled Keywords: Secure Things;FPGA, Bitstream, Public Key Cryptography, Dynamic Partial Reconfiguration, IP, Embedded Systems
Divisions: LOEWE > LOEWE-Zentren > CASED – Center for Advanced Security Research Darmstadt
LOEWE > LOEWE-Zentren
LOEWE
Date Deposited: 31 Dec 2016 00:15
Identification Number: ISS:Malipatlolla:2010:ANovelTechni:185
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